Hi,
After turning the MMU (turn_on_mmu) the next memory
access instruction (stwu) can not be translated, the
memory can not be accessed and the system halt. I
check the list archives and there are references to
set the Debug Enable Register (DER) to an
"appropriate" value. I am working with the MPC750 and
in the Users Manual I can't find any reference to such
register. Also I checked my bdi2000 (in case it was a
register on the bdi) and I didn't found anything.
This register exists or has its counterpart on the
MPC750? Besides the DER value, there are other
methods to work and find the problem?
Thanks,
Freddy Lugo
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Hi Freddy,
What address is it trying to address next? It needs to be sure its in the
range of the BATS setup by initial_bats, which maps the first 16Meg of
memory to KERNELBASE.
After turning MMU on, it should finish relocating the kernel. Is this the
part thats failing?
I'm referencing arch/ppc/kernel/head.S above.
Paul W.
At 01:41 PM 5/7/2001 -0700, Freddy Lugo wrote:
Hi,
After turning the MMU (turn_on_mmu) the next memory
access instruction (stwu) can not be translated, the
memory can not be accessed and the system halt. I
check the list archives and there are references to
set the Debug Enable Register (DER) to an
"appropriate" value. I am working with the MPC750 and
in the Users Manual I can't find any reference to such
register. Also I checked my bdi2000 (in case it was a
register on the bdi) and I didn't found anything.
This register exists or has its counterpart on the
MPC750? Besides the DER value, there are other
methods to work and find the problem?
Thanks,
Freddy Lugo
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Freddy Lugo wrote:
This register exists or has its counterpart on the
MPC750? Besides the DER value, there are other
methods to work and find the problem?
You are way, way, way lost...........You can't be building MPC8xx
code and expecting it to run on the 750. You need to select a
kernel configuration that enables 6xx/7xx/74xx processors and
a CHRP reference design.
-- Dan
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