Re: PCI Buses

3 messages, 3 authors, 2000-08-16 · open the first message on its own page

Re: PCI Buses

From: <hidden>
Date: 2000-08-15 18:52:58

I thought the 9500/9600 had two PCI buses with 3 slots each?

Jerry Quinn


tom_gall@vnet.ibm.com@lists.linuxppc.org on 08/15/2000 02:46:15 PM
Hi *,

  Just a stupid question here for those of you that have Mac hardware. Of
all
the Mac hardware in existance right now, all Macs have at most one PCI bus
right?

  Thanks for any info!

  Regards,

  Tom


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Re: PCI Buses

From: David Riley <hidden>
Date: 2000-08-15 19:13:59

jlquinn@us.ibm.com wrote:
I thought the 9500/9600 had two PCI buses with 3 slots each?

Jerry Quinn
Well, the 9500/9600 have 6 PCI slots, though it's anyone's guess as to how
many are on each bus.  However, the Blue G3's and all G4's as well as the
iBook and any other computer with AGP (including the "fake AGP" fast PCI slot
on the blue G3's) have two PCI busses, since AGP is only a fast PCI bus (with
a few enhancements, but as far as Linux is concerned, it's PCI).  AGP slots
will run compatible PCI cards at 66MHz (though there are certain keys which
prevent insertion unless the card is compatible).  A notable example is
3Dfx's Voodoo2 1000 card (and several other brands) which allow a 66 MHz bus.

On a side note, does anyone know if Linux properly supports the 64-bit PCI
slots in the Blue G3's and G4's?  The only cards I know of that use them are
several SCSI cards and TotalImpact cards.

Thanks,
    David


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Re: PCI Buses

From: Gabriel Paubert <hidden>
Date: 2000-08-16 08:51:31

On Tue, 15 Aug 2000, David Riley wrote:
On a side note, does anyone know if Linux properly supports the 64-bit PCI
slots in the Blue G3's and G4's?  The only cards I know of that use them are
several SCSI cards and TotalImpact cards.
From a software point of view 64 bit PCI is indistinguishable from 32 bit.
Actually MVME boards have a 64 bit PCI host bridge, although only the VME
bridge (Tundra's Universe) is a 64 bit device. The software just does not
care. PIO transfers of 32 bit or less (in practice all on a 32 bit
processor) will use standard PCI bus protocol for reads; writes may be
merged under some conditions by the processor or the host bridge as
explained for example in the PPC750 or CPC710 (IBM) doc. Still these
operations are often short (with the exception of graphics adapter memory
accesses) and the benefit of 64 bit transfers versus a short burst of 32
bit transfers is minimal.

DMA operations on the other hand benefit a lot from 64 bit transfers,
since well designed adapters will have large FIFOs and generate bursts of
several tens of transfers at which point the overhead of setting up the
operation becomes small. In practice this almost halves the bus
utilization.


	Regards,
	Gabriel


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