ppc assembler help needed

Hi,

I have some problems understanding the following code snippet. It is
from misc.S in kernel 2.3.

The function call is like this:

void _insl_ns(volatile u32 *port, u32 *buf, int nl)

_GLOBAL(_insl_ns)
        cmpw  0,r5,0
        mtctr   r5
        subi    r4,r4,4
        blelr-
00:     lwz     r5,0(r3)
        eieio
        stwu    r5,4(r4)
        bdnz    00b
        blr

Am I right with port = r3, buf = r4, nl = r5?
If so, cmpw 0,r5,0 compares the content of r5, in my case nl, with zero
and stores the result in CR0?

What does blelr- exactly do? 'branch if less than or equal' according to
the 'Programming Environment for 32bit uPs' from Motorola.
Commenting out the cmpw and the blelr- line as in kernel-2.2, then the
function works. The values from nl are in the range from 10 to 20 (int).
So the the blelr- shouldn't happen.

The function in C looks a bit like: (Thanks to Paul)

void _insl_ns(volatile u32 *port, u32 *buf, int nl)
{
        if (nl <= 0)
                return;
        do {
                *buf++ = *port;
                eieio();
        } while (--nl != 0);
}

Thanks for any explanation

Andreas

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At 17:54 15.05.00, Andreas Tobler wrote:

Hi,

I have some problems understanding the following code snippet. It is
from misc.S in kernel 2.3.

The function call is like this:

void _insl_ns(volatile u32 *port, u32 *buf, int nl)

_GLOBAL(_insl_ns)
        cmpw  0,r5,0
        mtctr   r5
        subi    r4,r4,4
        blelr-
00:     lwz     r5,0(r3)
        eieio
        stwu    r5,4(r4)
        bdnz    00b
        blr

Am I right with port = r3, buf = r4, nl = r5?
If so, cmpw 0,r5,0 compares the content of r5, in my case nl, with zero
and stores the result in CR0?

No, cmpw 0,r5,0 compares r5 to r0, use cmpwi 0,r5,0 to make a signed
compare of r5 against 0

Franz.


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Hoi Franz,

Franz Sirl wrote:

No, cmpw 0,r5,0 compares r5 to r0, use cmpwi 0,r5,0 to make a signed
compare of r5 against 0

This works, thanks. The next question is automatically in the queue:

all functions, insX/outsX in misc.S use this cmpw 0,r5,0, shouldn't it
be a cmpwi 0,r5,0 then?

Thanks,
Andreas

BTW, does it mind which CPU is behind? In my case it's a 601.

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