From: Adrian Cox <hidden> Date: 2000-02-04 10:29:26
Altivec raises an interesting question of binary compatibility, in the
area of C++ exceptions and C setjmp/longjmp.
As the jmp_buf is a different size in Altivec and non-Altivec code, it
is not possible to jump or pass exceptions between the two. This is a
problem, because:
1) Now would not be a good time to change the size of a jmp_buf.
2) We do not need two incompatible 32-bit PowerPC ABIs under Linux.
2a) Most libraries installed by a distribution will be non-Altivec code,
to avoid having both G[123] and G4 binary variants of the distribution.
To add to the problem, throwing exceptions on an error is just what a
modern C++ library is supposed to do. Throwing or catching an exception
in Altivec code will produce sequences that cannot execute on a G3
(which is precisely what got me considering this).
Does anybody have any bright ideas, beyond ensuring that everybody
restricts the use of Altivec compilation to routines which only call
safe functions? As long as Altivec code requires the vector keyword,
that's probably a reasonable assumption.
- Adrian Cox, AG Electronics
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
Altivec raises an interesting question of binary compatibility, in the
area of C++ exceptions and C setjmp/longjmp.
As the jmp_buf is a different size in Altivec and non-Altivec code
Because with Altivec we need to save V registers, right ? Well, I suppose
intel developers had the same problem with P-III "vector" unit. How did they
solve the problem ?
it is not possible to jump or pass exceptions between the two.
This is a problem, because:
1) Now would not be a good time to change the size of a jmp_buf.
2) We do not need two incompatible 32-bit PowerPC ABIs under Linux.
2a) Most libraries installed by a distribution will be non-Altivec code,
to avoid having both G[123] and G4 binary variants of the distribution.
I agree.
To add to the problem, throwing exceptions on an error is just what a
modern C++ library is supposed to do. Throwing or catching an exception
in Altivec code will produce sequences that cannot execute on a G3
Why ?? (sorry for my ignorance...)
Bye.
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From: Adrian Cox <hidden> Date: 2000-02-07 18:06:58
Giuliano Pochini wrote:
Giuliano Pochini wrote:
quoted
As the jmp_buf is a different size in Altivec and non-Altivec code
Because with Altivec we need to save V registers, right ? Well, I suppose
intel developers had the same problem with P-III "vector" unit. How did they
solve the problem ?
As far as I can tell, by ignoring it, and making the assumption that
only low-level libraries will use the vector registers. I plan to take
a similar approach, and warn users not to mix Altivec and exceptions.
quoted
To add to the problem, throwing exceptions on an error is just what a
modern C++ library is supposed to do. Throwing or catching an exception
in Altivec code will produce sequences that cannot execute on a G3
Why ?? (sorry for my ignorance...)
I haven't studied GCC's implementation of exceptions in great detail.
The compiler saves and restores all the non-transient registers as part
of the exception sequence. When generating Altivec code this produces
stvx and lvx instructions, which will cause an illegal instruction
exception on G3 processors.
- Adrian Cox
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
Because with Altivec we need to save V registers, right ? Well, I suppose
intel developers had the same problem with P-III "vector" unit. How did they
solve the problem ?
As far as I can tell, by ignoring it, and making the assumption that
only low-level libraries will use the vector registers.
mm :-/
I plan to take
a similar approach, and warn users not to mix Altivec and exceptions.
From altivec p. e. m.: "1.2.6 - The AltiVec vector unit never generates an
exception"
I just started to read the book, but I think AltiVec tells nothing even on
things like divisions by 0, etc.
quoted
quoted
To add to the problem, throwing exceptions on an error is just what a
modern C++ library is supposed to do. Throwing or catching an exception
in Altivec code will produce sequences that cannot execute on a G3
Why ?? (sorry for my ignorance...)
I haven't studied GCC's implementation of exceptions in great detail.
The compiler saves and restores all the non-transient registers as part
of the exception sequence. When generating Altivec code this produces
stvx and lvx instructions, which will cause an illegal instruction
exception on G3 processors.
Ok, the programmmer will have to check for AltiVec at the beginning of the
program. What's really important is that programs compiled for 603, 604, G3,
will work fine on G4.
Bye.
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From: Adrian Cox <hidden> Date: 2000-02-11 09:41:14
Giuliano Pochini wrote:
From altivec p. e. m.: "1.2.6 - The AltiVec vector unit never generates an
exception"
I just started to read the book, but I think AltiVec tells nothing even on
things like divisions by 0, etc.
C++ exceptions, not machine exceptions:
if (failure()) thow Oops();
- Adrian Cox, AG Electronics
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