Re: /dev/watchdog for onchip MPC860 watchdog?

I've also been thinking about this...

If the boot process goes bad, then the interrupt driven watchdog will
keep getting reset and prevent the watchdog from firing...leading to a
unrecoverable hang.  So, what's the likely hood of the boot process
going bad?

Our application requires downloading new kernels and applications and this
may
increase the likely hood that a kernel fails to complete the boot process.

This idea has a window of vunerability but how much and how likely???

Maybe the timer can be set longer than the longest bootup time or at least
until the first daemon gets going?

jeff

Hello,

I'm using the watchdog timer on a custom board since several months. To
prevent a CPU reset during the kernel is uncompressing, i prorammed it
to generate a Non Maskable Interrupt instead of system reset. Those NMIs
are handled by a special function in the Linux kernel. This function
can reset the board, using a specific I/O, when too many NMIs occurred
without any watchdog timer (SWSR) servicing.

Today, i refresh the timer in my real time application that is launched
immediately after the kernel init. This scheme must work for any board
launching an appli/real time module after kernel init. For other configurations,
Dan's idea seems perfect.

	Raphael

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Raphael Massin wrote:

... i prorammed it
to generate a Non Maskable Interrupt instead of system reset. Those NMIs
are handled by a special function in the Linux kernel. This function
can reset the board, using a specific I/O, when too many NMIs occurred
without any watchdog timer (SWSR) servicing.

That's not exactly the same thing.  You still rely upon some,
although smaller, piece of software and proper operation of your
counter (a memory location that could be corrupted by errant
software) to perform the watchdog service.

..... configurations,
Dan's idea seems perfect.

A far from perfect alternative.......


	-- Dan

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