Re: G3 Upgrade Questions....

2 messages, 2 authors, 1999-07-29 · open the first message on its own page

Re: G3 Upgrade Questions....

From: Takayuki Yamaizumi <hidden>
Date: 1999-07-29 04:46:26


  Hi, Jeremy & Paul,

jeremy> On 28-Jul-99 Paul Mackerras wrote:
quoted
Yeah, reading the temperature isn't actually implemented yet.
jeremy> I've got a patch.  I polish it up and send it out soon.

  I have also created another patch, but not polished :-) This patch 
is relative to the latest 2.2.10 vger kernel.

  It works like the following on my PowerBook G3 (266MHz/14.1inch
screen), but I can't check CPU's "real" tempetature, I am not sure
this value is correct. 

ty@asama{pts/4}(~)[14:06]: cat /proc/cpuinfo 
processor       : 0
cpu             : 750
temperature     : 47 C
clock           : 264MHz
revision        : 2.2
bogomips        : 532.48
zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/190 (0%)
machine         : PowerBook
motherboard     : AAPL,PowerBook1998 MacRISC
L2 cache        : 1024K unified pipelined-syncro-burst
memory          : 128MB

  Hope this works & helps,

--
Takayuki Yamaizumi
Software Development Lab. IBM Japan.
E-mail: ty@kamoi.imasy.or.jp, ty@tokusen.org (Home)
        zumi@yamato.ibm.co.jp (Office)
--- linux/arch/ppc/kernel/setup.c.ORG	Wed Jul 28 19:35:25 1999
+++ linux/arch/ppc/kernel/setup.c	Wed Jul 28 19:37:21 1999
@@ -167,33 +167,117 @@
 }
 #endif
 
+/* This is a temporary definition which should be configurable  *
+ * from "make config" and some. - Takayuki Yamaizumi            *
+ * <ty@kamoi.imasy.or.jp>                                       */
+
+#define CONFIG_PPC750_CPUTEMP
+
+#ifdef CONFIG_PPC750_CPUTEMP
+/* From drivers/ap1000/apfddi.c */
+u_char cpu_temp_bitrev[256] = {
+    0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
+    0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
+    0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
+    0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
+    0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
+    0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
+    0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
+    0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
+    0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
+    0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
+    0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea,
+    0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
+    0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6,
+    0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
+    0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee,
+    0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
+    0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1,
+    0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
+    0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9,
+    0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
+    0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5,
+    0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
+    0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed,
+    0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
+    0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3,
+    0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
+    0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb,
+    0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
+    0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7,
+    0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
+    0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef,
+    0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff,
+};
+
+#define bit_reverse32(x) \
+  (((__u32) cpu_temp_bitrev[((x) & 0xff000000UL) >> 24]) | \
+   ((__u32) cpu_temp_bitrev[((x) & 0x00ff0000UL) >> 16] << 8) | \
+   ((__u32) cpu_temp_bitrev[((x) & 0x0000ff00UL) >> 8] << 16) | \
+   ((__u32) cpu_temp_bitrev[((x) & 0x000000ffUL)] << 24))
+
+#endif /* CONFIG_PPC750_CPUTEMP */
+
 unsigned long cpu_temp(void)
 {
-	unsigned char thres = 0;
+#ifdef CONFIG_PPC750_CPUTEMP
+
+	int thres = 0;
+	unsigned char flg = 0;
+	unsigned long othrm1, thrm3, thrm1, in_thrm1;
+	int sanity;
+
+	extern void _set_THRM1(unsigned long);
+	extern void _set_THRM2(unsigned long);
+	extern void _set_THRM3(unsigned long);
+	extern unsigned long _get_THRM1(void);
+	extern unsigned long _get_THRM2(void);
+	extern unsigned long _get_THRM3(void);
 	
-#if 0
 	/* disable thrm2 */
 	_set_THRM2( 0 );
 	/* threshold 0 C, tid: exceeding threshold, tie: don't generate interrupt */
-	_set_THRM1( THRM1_V );
-
 	/* we need 20us to do the compare - assume 300MHz processor clock */
 	_set_THRM3(0);
-	_set_THRM3(THRM3_E | (300*30)<<18 );
 
-	udelay(100);
+	thrm3 = bit_reverse32(THRM3_E | ((300*21)<<18));
+	_set_THRM3(thrm3);
+
+	for (thres = 127, flg = 0; thres >= 0 && flg == 0; thres--) {
+	  in_thrm1 = (bit_reverse32(THRM1_V | THRM1_TID) | (thres<<23));
+	  _set_THRM1(in_thrm1);
+ 
 	/* wait for the compare to complete */
-	/*while ( !(_get_THRM1() & THRM1_TIV) ) ;*/
-	if ( !(_get_THRM1() & THRM1_TIV) )
-		printk("no tiv\n");
-	if ( _get_THRM1() & THRM1_TIN )
-		printk("crossed\n");
+	  sanity = 30000;
+	  othrm1 = _get_THRM1();
+	  thrm1 = bit_reverse32(othrm1);
+
+	  while ( (!(thrm1 & THRM1_TIV)) && (sanity-- >= 0) ) {
+	    udelay(1);
+	    othrm1 = _get_THRM1();
+	    thrm1 = bit_reverse32(othrm1);
+	  }
+	  if (sanity < 0) printk("no sanity\n");
+
+	  if ( !(thrm1 & THRM1_TIN) ) {
+	    printk(KERN_DEBUG "not crossed temp = %d C: This may be a current temperature.\n", thres);
+	    flg++;
+	  }
+#if 0
+	  else
+	    printk("crossed temp = %d C\n", thres);
+#endif
+
+	}
 	/* turn everything off */
 	_set_THRM3(0);
 	_set_THRM1(0);
+	
+	return ++thres;
+#else
+
+	return 0;
 #endif
-		
-	return thres;
 }
 
 int get_cpuinfo(char *buffer)


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Re: G3 Upgrade Questions....

From: Adrian Cox <hidden>
Date: 1999-07-29 09:09:17

Takayuki Yamaizumi wrote:
  I have also created another patch, but not polished :-) This patch
is relative to the latest 2.2.10 vger kernel.

  It works like the following on my PowerBook G3 (266MHz/14.1inch
screen), but I can't check CPU's "real" tempetature, I am not sure
this value is correct.
I'm a little confused by this patch, because it is very different from
Motorola's application note AN1800/D (Programming the Thermal Assist
Unit in the MPC750 Microprocessor). 

http://www.mot.com/SPS/PowerPC/teksupport/teklibrary/appnotes/an1800.pdf

1) No calibration. The board vendor is supposed to calibrate the TAU
before shipping the board, then supply the calibration value. I'm not
sure whether Apple do this.
2) Why all the time spent doing bit reversals? Why not just fix the
broken values in processor.h and test the correct bits to start with?

- Adrian Cox, AG Electronics

[[ This message was sent via the linuxppc-dev mailing list.  Replies are ]]
[[ not  forced  back  to the list, so be sure to Cc linuxppc-dev if your ]]
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[[ and http://www.linuxppc.org/ for useful information before posting.   ]]
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