[PATCH] usb: chipidea: add loop timeout for hw_ep_set_halt()
From: Jeaho Hwang <hidden>
Date: 2021-08-09 11:21:58
If ctrl EP priming is failed (very rare case in standard linux), hw_ep_set_halt goes infinite loop. 50 was enough for zynq7000. Signed-off-by: Jeaho Hwang <redacted> --- drivers/usb/chipidea/udc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index d0cd1de1b6c7..92ca0b7e4310 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c@@ -210,6 +210,9 @@ static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) return 0; } +/*will it be enough?*/ +#define HW_EP_SET_HALT_COUNT_MAX 100 + /** * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute * without interruption)
@@ -222,6 +225,7 @@ static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) */ static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) { + int count = HW_EP_SET_HALT_COUNT_MAX; if (value != 0 && value != 1) return -EINVAL;
@@ -233,9 +237,9 @@ static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) /* data toggle - reserved for EP0 but it's in ESS */ hw_write(ci, reg, mask_xs|mask_xr, value ? mask_xs : mask_xr); - } while (value != hw_ep_get_halt(ci, num, dir)); + } while (value != hw_ep_get_halt(ci, num, dir) && --count > 0); - return 0; + return count ? 0 : -EAGAIN; } /**
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2.25.1