[GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13

7 messages, 4 authors, 2014-12-02 · open the first message on its own page

[GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13

From: Simon Horman <hidden>
Date: 2013-10-01 02:39:15

Hi Kevin, Olof and Arnd,

please consider these Renesas ARM-based SoC DT updates for v3.13.

This pull-request is based on v3.12-rc1.


The following changes since commit 272b98c6455f00884f0350f775c5342358ebb73f:

  Linux 3.12-rc1 (2013-09-16 16:17:51 -0400)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v3.13

for you to fetch changes up to 3da4c3039907b655e1758835d57b914a73ff7f5a:

  ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI (2013-09-19 14:37:35 -0700)

----------------------------------------------------------------
Renesas ARM-based SoC DT updates for v3.13

* Add CPU cores to DTSI of r8a7790 SoC
* Add MMCIF and SDHI DT nodes for reference DTS of ape6evm board

----------------------------------------------------------------
Guennadi Liakhovetski (1):
      ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes

Magnus Damm (2):
      ARM: shmobile: Add r8a7790 CA15 CPU cores
      ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI

 arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 72 +++++++++++++++++++++++++
 arch/arm/boot/dts/r8a7790.dtsi                  | 49 +++++++++++++++++
 2 files changed, 121 insertions(+)

[PATCH 1/3] ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes

From: Simon Horman <hidden>
Date: 2013-10-01 02:39:19

From: Guennadi Liakhovetski <redacted>

This patch adds MMCIF0, SDHI0 and SDHI1 DT nodes and a fixed voltage
reglator for them to the ape6evm-reference platform.

Signed-off-by: Guennadi Liakhovetski <redacted>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <redacted>
---
 arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 72 +++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
index f444624..2b49b05 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts

@@ -10,6 +10,7 @@
 
 /dts-v1/;
 /include/ "r8a73a4.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "APE6EVM";

@@ -24,6 +25,34 @@
 		reg = <0 0x40000000 0 0x40000000>;
 	};
 
+	vcc_mmc0: regulator@0 {
+		compatible = "regulator-fixed";
+		regulator-name = "MMC0 Vcc";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		regulator-always-on;
+	};
+
+	vcc_sdhi0: regulator@1 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "SDHI0 Vcc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&pfc 76 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	/* Common 3.3V rail, used by several devices on APE6EVM */
+	ape6evm_fixed_3v3: regulator@2 {
+		compatible = "regulator-fixed";
+		regulator-name = "3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
 	lbsc {
 		compatible = "simple-bus";
 		#address-cells = <1>;

@@ -62,4 +91,47 @@
 		renesas,groups = "scifa0_data";
 		renesas,function = "scifa0";
 	};
+
+	mmc0_pins: mmcif {
+		renesas,groups = "mmc0_data8", "mmc0_ctrl";
+		renesas,function = "mmc0";
+	};
+
+	sdhi0_pins: sdhi0 {
+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
+		renesas,function = "sdhi0";
+	};
+
+	sdhi1_pins: sdhi1 {
+		renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
+		renesas,function = "sdhi1";
+	};
+};
+
+&mmcif0 {
+	vmmc-supply = <&vcc_mmc0>;
+	bus-width = <8>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins>;
+	status = "okay";
+};
+
+&sdhi0 {
+	vmmc-supply = <&vcc_sdhi0>;
+	bus-width = <4>;
+	toshiba,mmc-wrprotect-disable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdhi0_pins>;
+	status = "okay";
+};
+
+&sdhi1 {
+	vmmc-supply = <&ape6evm_fixed_3v3>;
+	bus-width = <4>;
+	broken-cd;
+	toshiba,mmc-wrprotect-disable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdhi1_pins>;
+	status = "okay";
 };

-- 
1.8.4

[PATCH 2/3] ARM: shmobile: Add r8a7790 CA15 CPU cores

From: Simon Horman <hidden>
Date: 2013-10-01 02:39:20

From: Magnus Damm <redacted>

Add CA15 CPU cores to r8a7790 for a total of 4 x CA15.

Signed-off-by: Magnus Damm <redacted>
Signed-off-by: Simon Horman <redacted>
---
 arch/arm/boot/dts/r8a7790.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 3b879e7..388f49f 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi

@@ -24,6 +24,27 @@
 			reg = <0>;
 			clock-frequency = <1300000000>;
 		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <1>;
+			clock-frequency = <1300000000>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <2>;
+			clock-frequency = <1300000000>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <3>;
+			clock-frequency = <1300000000>;
+		};
 	};
 
 	gic: interrupt-controller@f1001000 {

-- 
1.8.4

[PATCH 3/3] ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI

From: Simon Horman <hidden>
Date: 2013-10-01 02:39:21

From: Magnus Damm <redacted>

Add r8a7790 Cortex-A7 CPU information to DTSI.

Signed-off-by: Magnus Damm <redacted>
Signed-off-by: Simon Horman <redacted>
---
 arch/arm/boot/dts/r8a7790.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 388f49f..a0cfb661 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi

@@ -45,6 +45,34 @@
 			reg = <3>;
 			clock-frequency = <1300000000>;
 		};
+
+		cpu4: cpu@4 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x100>;
+			clock-frequency = <780000000>;
+		};
+
+		cpu5: cpu@5 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x101>;
+			clock-frequency = <780000000>;
+		};
+
+		cpu6: cpu@6 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x102>;
+			clock-frequency = <780000000>;
+		};
+
+		cpu7: cpu@7 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x103>;
+			clock-frequency = <780000000>;
+		};
 	};
 
 	gic: interrupt-controller@f1001000 {

-- 
1.8.4

[GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13

From: horms@verge.net.au (Simon Horman)
Date: 2013-10-01 04:08:51

On Tue, Oct 01, 2013 at 11:39:15AM +0900, Simon Horman wrote:

Hi Kevin, Olof and Arnd,

please consider these Renesas ARM-based SoC DT updates for v3.13.

This pull-request is based on v3.12-rc1.


The following changes since commit 272b98c6455f00884f0350f775c5342358ebb73f:

  Linux 3.12-rc1 (2013-09-16 16:17:51 -0400)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v3.13

Please ignore this, I will repost a corrected pull-request shortly.

for you to fetch changes up to 3da4c3039907b655e1758835d57b914a73ff7f5a:

  ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI (2013-09-19 14:37:35 -0700)

----------------------------------------------------------------
Renesas ARM-based SoC DT updates for v3.13

* Add CPU cores to DTSI of r8a7790 SoC
* Add MMCIF and SDHI DT nodes for reference DTS of ape6evm board

----------------------------------------------------------------
Guennadi Liakhovetski (1):
      ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes

Magnus Damm (2):
      ARM: shmobile: Add r8a7790 CA15 CPU cores
      ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI

 arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 72 +++++++++++++++++++++++++
 arch/arm/boot/dts/r8a7790.dtsi                  | 49 +++++++++++++++++
 2 files changed, 121 insertions(+)

[PATCH 1/3] ARM: shmobile: ape6evm-reference: add ethernet controller to DT

From: Ulrich Hecht <hidden>
Date: 2014-12-02 08:37:05

Describes the SMSC LAN9220 chip.  It is not currently enabled because a suitable
mechanism for activating its clock (zb) is yet to be developed.

Signed-off-by: Ulrich Hecht <redacted>
---
 arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
index 84e05f7..a218c26 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts

@@ -68,6 +68,19 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0 0 0 0x80000000>;
+
+		ethernet@8000000 {
+			compatible = "smsc,lan9220", "smsc,lan9115";
+			reg = <0x08000000 0x1000>;
+			interrupt-parent = <&irqc1>;
+			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+			phy-mode = "mii";
+			reg-io-width = <4>;
+			smsc,irq-active-high;
+			smsc,irq-push-pull;
+			vddvario-supply = <&ape6evm_fixed_3v3>;
+			vdd33a-supply = <&ape6evm_fixed_3v3>;
+		};
 	};
 };

-- 
1.8.4.5

Re: [PATCH 1/3] ARM: shmobile: ape6evm-reference: add ethernet controller to DT

From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2014-12-02 17:42:02

Hi Ulrich,

On Tue, Dec 2, 2014 at 9:37 AM, Ulrich Hecht
[off-list ref] wrote:

Describes the SMSC LAN9220 chip.  It is not currently enabled because a suitable
mechanism for activating its clock (zb) is yet to be developed.

Have you tried the mechanism from "[PATCH RFC 0/3] Add "Simple" / Renesas Bus
State Controller Driver" (https://lkml.org/lkml/2014/11/24/661)?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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