# Re: \[PATCH v3 13/19\] clk: starfive: jh7110-vout: Allow pixel clock rate propagation

- From: sashiko-bot@kernel.org
- Date: 2026-09-04 13:45:03 
- List: linux-phy
- Page: https://ratatoskr.run/linux-phy/2026/09/17514455
- Thread: https://ratatoskr.run/linux-devicetree/2026/09/17514319/t.md

```text
> The dc8200_pix0 and dc8200_pix1 MUXes feed the display controller, and
> the rate they carry is ultimately produced by the HDMI PHY, which
> registers hdmitx0_pixelclk as a clock provider.
> 
> Add CLK_SET_RATE_PARENT to both MUXes so a rate requested on them
> reaches that parent, instead of being clamped to whatever rate the
> parent already happens to run at.
> 
> Co-developed-by: Dominique Belhachemi <redacted>
> Signed-off-by: Dominique Belhachemi <redacted>
> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>

Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260904-jh7110-clean-send-v3-0-484f9ae72715@samsung.com?part=13


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