[PATCH 1/2] phy: samsung-ufs: custom PHY_TRSV_CH_OFFSET support
From: Chanho Park <hidden>
Date: 2021-07-05 10:24:26
Subsystem:
generic phy framework, the rest · Maintainers:
Vinod Koul, Linus Torvalds
To support custom PHY_TSRV_CH_OFFSET for ExynosAuto v9 series SoC, we can add PHY_TRSV_REG_CFG_OFFSET macro which has an offset field and let it be used from PHY_TRSV_REG_CFG with the default value. Signed-off-by: Chanho Park <redacted> --- drivers/phy/samsung/phy-samsung-ufs.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
index 5de78710524c..ea1ac38889c1 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.h
+++ b/drivers/phy/samsung/phy-samsung-ufs.h@@ -24,14 +24,17 @@ .id = PHY_COMN_BLK, \ } -#define PHY_TRSV_REG_CFG(o, v, d) { \ +#define PHY_TRSV_REG_CFG_OFFSET(o, v, d, c) { \ .off_0 = PHY_APB_ADDR((o)), \ - .off_1 = PHY_APB_ADDR((o) + PHY_TRSV_CH_OFFSET), \ + .off_1 = PHY_APB_ADDR((o) + (c)), \ .val = (v), \ .desc = (d), \ .id = PHY_TRSV_BLK, \ } +#define PHY_TRSV_REG_CFG(o, v, d) \ + PHY_TRSV_REG_CFG_OFFSET(o, v, d, PHY_TRSV_CH_OFFSET) + /* UFS PHY registers */ #define PHY_PLL_LOCK_STATUS 0x1e #define PHY_CDR_LOCK_STATUS 0x5e
--
2.32.0
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