[PATCH v7 13/19] phy: sun4i-usb: Allow reset line to be shared

Subsystems: generic phy framework, the rest

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Revision v7 of 7 in this series.

2 messages, 2 authors, 2021-06-15 · open the first message on its own page

[PATCH v7 13/19] phy: sun4i-usb: Allow reset line to be shared

From: Andre Przywara <andre.przywara@arm.com>
Date: 2021-06-15 11:08:12

The USB HCIs (and PHYs?) in Allwinner's newer generation SoCs (H616)
rely on the reset line of USB PHY 2 to be de-asserted, even when only
one of the other PHYs is actually in use.

To make those ports work, we include this reset line in the HCIs' resets
property, which requires this line to be shareable.

Change the call to allocate the reset line to mark it as shared, to
enable the other ports on those SoCs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 drivers/phy/allwinner/phy-sun4i-usb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index 142f4cafdc78..126ef74d013c 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -788,7 +788,7 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev)
 		}
 
 		snprintf(name, sizeof(name), "usb%d_reset", i);
-		phy->reset = devm_reset_control_get(dev, name);
+		phy->reset = devm_reset_control_get_shared(dev, name);
 		if (IS_ERR(phy->reset)) {
 			dev_err(dev, "failed to get reset %s\n", name);
 			return PTR_ERR(phy->reset);
-- 
2.17.5


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Re: [PATCH v7 13/19] phy: sun4i-usb: Allow reset line to be shared

From: Philipp Zabel <p.zabel@pengutronix.de>
Date: 2021-06-15 11:26:08

On Tue, 2021-06-15 at 12:06 +0100, Andre Przywara wrote:
The USB HCIs (and PHYs?) in Allwinner's newer generation SoCs (H616)
rely on the reset line of USB PHY 2 to be de-asserted, even when only
one of the other PHYs is actually in use.

To make those ports work, we include this reset line in the HCIs' resets
property, which requires this line to be shareable.

Change the call to allocate the reset line to mark it as shared, to
enable the other ports on those SoCs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

regards
Philipp

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