[linux-next:master 3984/7405] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:491:6: error: no previous prototype for 'dpp3_deferred_update'

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head:   d3134eb5de8546a214c028fb7195e764b89da7d4
commit: 028a998c62f72cb879d44809cb96acdcc47d6137 [3984/7405] drm/amd/display: Defer LUT memory powerdown until LUT bypass latches
config: i386-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=028a998c62f72cb879d44809cb96acdcc47d6137
        git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
        git fetch --no-tags linux-next master
        git checkout 028a998c62f72cb879d44809cb96acdcc47d6137
        # save the attached .config to linux build tree
        make W=1 ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <redacted>

All errors (new ones prefixed by >>):

   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:44:6: error: no previous prototype for 'dpp30_read_state' [-Werror=missing-prototypes]
      44 | void dpp30_read_state(struct dpp *dpp_base,
         |      ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:376:6: error: no previous prototype for 'dpp3_get_optimal_number_of_taps' [-Werror=missing-prototypes]
     376 | bool dpp3_get_optimal_number_of_taps(
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:477:6: error: no previous prototype for 'dpp3_cnv_set_bias_scale' [-Werror=missing-prototypes]
     477 | void dpp3_cnv_set_bias_scale(
         |      ^~~~~~~~~~~~~~~~~~~~~~~

quoted

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:491:6: error: no previous prototype for 'dpp3_deferred_update' [-Werror=missing-prototypes]

     491 | void dpp3_deferred_update(
         |      ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:740:6: error: no previous prototype for 'dpp3_program_blnd_lut' [-Werror=missing-prototypes]
     740 | bool dpp3_program_blnd_lut(
         |      ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:1153:6: error: no previous prototype for 'dpp3_program_shaper' [-Werror=missing-prototypes]
    1153 | bool dpp3_program_shaper(
         |      ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:1344:6: error: no previous prototype for 'dpp3_program_3dlut' [-Werror=missing-prototypes]
    1344 | bool dpp3_program_3dlut(
         |      ^~~~~~~~~~~~~~~~~~
   cc1: all warnings being treated as errors


vim +/dpp3_deferred_update +491 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c

   490	
 > 491	void dpp3_deferred_update(
   492		struct dpp *dpp_base)
   493	{
   494		int bypass_state;
   495		struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
   496	
   497		if (dpp_base->deferred_reg_writes.bits.disable_blnd_lut) {
   498			REG_GET(CM_BLNDGAM_CONTROL, CM_BLNDGAM_MODE_CURRENT, &bypass_state);
   499			if (bypass_state == 0) {	// only program if bypass was latched
   500				REG_UPDATE(CM_MEM_PWR_CTRL, BLNDGAM_MEM_PWR_FORCE, 3);
   501			} else
   502				ASSERT(0); // LUT select was updated again before vupdate
   503			dpp_base->deferred_reg_writes.bits.disable_blnd_lut = false;
   504		}
   505	
   506		if (dpp_base->deferred_reg_writes.bits.disable_3dlut) {
   507			REG_GET(CM_3DLUT_MODE, CM_3DLUT_MODE_CURRENT, &bypass_state);
   508			if (bypass_state == 0) {	// only program if bypass was latched
   509				REG_UPDATE(CM_MEM_PWR_CTRL2, HDR3DLUT_MEM_PWR_FORCE, 3);
   510			} else
   511				ASSERT(0); // LUT select was updated again before vupdate
   512			dpp_base->deferred_reg_writes.bits.disable_3dlut = false;
   513		}
   514	
   515		if (dpp_base->deferred_reg_writes.bits.disable_shaper) {
   516			REG_GET(CM_SHAPER_CONTROL, CM_SHAPER_MODE_CURRENT, &bypass_state);
   517			if (bypass_state == 0) {	// only program if bypass was latched
   518				REG_UPDATE(CM_MEM_PWR_CTRL2, SHAPER_MEM_PWR_FORCE, 3);
   519			} else
   520				ASSERT(0); // LUT select was updated again before vupdate
   521			dpp_base->deferred_reg_writes.bits.disable_shaper = false;
   522		}
   523	}
   524	

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