Resend: [PATCH] [MIPS] Fix asm constraints for 'ins' instructions.
From: David Daney <hidden>
Date: 2008-06-11 17:08:40
Subsystem:
the rest · Maintainer:
Linus Torvalds
This patch may have been lost in the Great LMO Firewall Saga, so I am resending it: -------- Original Message -------- Subject: [PATCH] [MIPS] Fix asm constraints for 'ins' instructions. Date: Tue, 27 May 2008 00:04:20 -0700 From: David Daney <redacted> To: linux-mips@linux-mips.org The third operand to 'ins' must be a constant int, not a register. Signed-off-by: David Daney <redacted> --- include/asm-mips/bitops.h | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 6427247..9a7274b 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h@@ -82,7 +82,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) "2: b 1b \n" " .previous \n" : "=&r" (temp), "=m" (*m) - : "ir" (bit), "m" (*m), "r" (~0)); + : "i" (bit), "m" (*m), "r" (~0)); #endif /* CONFIG_CPU_MIPSR2 */ } else if (cpu_has_llsc) { __asm__ __volatile__(
@@ -147,7 +147,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) "2: b 1b \n" " .previous \n" : "=&r" (temp), "=m" (*m) - : "ir" (bit), "m" (*m)); + : "i" (bit), "m" (*m)); #endif /* CONFIG_CPU_MIPSR2 */ } else if (cpu_has_llsc) { __asm__ __volatile__(
@@ -428,7 +428,7 @@ static inline int test_and_clear_bit(unsigned long nr, "2: b 1b \n" " .previous \n" : "=&r" (temp), "=m" (*m), "=&r" (res) - : "ri" (bit), "m" (*m) + : "i" (bit), "m" (*m) : "memory"); #endif } else if (cpu_has_llsc) {
--
1.5.4.5