--- v12
+++ v8
@@ -5,21 +5,15 @@
Signed-off-by: Roy Im <roy.im.opensource@diasemi.com>
---
-v11:
- - Updated the pwm related code, comments and typo.
-v10:
- - Updated the pwm related function and added some comments.
-v9:
- - Removed the header file and put the definitions into the c file.
- - Updated the pwm code and error logs with %pE
v8:
- - Added changes to support FF_PERIODIC/FF_CUSTOM and FF_CONSTANT.
- - Updated the dt-related code.
- - Removed memless related functions.
+ - Removed memless code
+ - Added changes to support FF_CUSTOM and other types.
+ - Updated the dt-related code and descriptions.
v7:
- Added more attributes to handle one value per file.
- Replaced and updated the dt-related code and functions called.
- Fixed error/functions.
+ - Rebased to v4.19-rc6.
v6: No changes.
v5: Fixed errors in Kconfig file.
v4: Updated code as dt-bindings are changed.
@@ -29,15 +23,17 @@
drivers/input/misc/Kconfig | 13 +
drivers/input/misc/Makefile | 1 +
- drivers/input/misc/da7280.c | 1898 +++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 1912 insertions(+)
+ drivers/input/misc/da7280.c | 1683 +++++++++++++++++++++++++++++++++++++++++++
+ drivers/input/misc/da7280.h | 412 +++++++++++
+ 4 files changed, 2109 insertions(+)
create mode 100644 drivers/input/misc/da7280.c
+ create mode 100644 drivers/input/misc/da7280.h
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
-index 7e2e658..e2bf442 100644
+index 7d9ae394..2414be9 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
-@@ -879,4 +879,17 @@ config INPUT_STPMIC1_ONKEY
+@@ -894,4 +894,17 @@ config INPUT_STPMIC1_ONKEY
To compile this driver as a module, choose M here: the
module will be called stpmic1_onkey.
@@ -69,15 +65,15 @@
obj-$(CONFIG_INPUT_DA9063_ONKEY) += da9063_onkey.o
diff --git a/drivers/input/misc/da7280.c b/drivers/input/misc/da7280.c
new file mode 100644
-index 0000000..2dd76d2
+index 0000000..05410f9
--- /dev/null
+++ b/drivers/input/misc/da7280.c
-@@ -0,0 +1,1898 @@
+@@ -0,0 +1,1683 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * DA7280 Haptic device driver
+ *
-+ * Copyright (c) 2020 Dialog Semiconductor.
++ * Copyright (c) 2019 Dialog Semiconductor.
+ * Author: Roy Im <Roy.Im.Opensource@diasemi.com>
+ */
+
@@ -90,183 +86,9 @@
+#include <linux/regmap.h>
+#include <linux/workqueue.h>
+#include <linux/uaccess.h>
-+#include <linux/bitops.h>
-+
-+/* Registers */
-+#define DA7280_IRQ_EVENT1 0x03
-+#define DA7280_IRQ_EVENT_WARNING_DIAG 0x04
-+#define DA7280_IRQ_EVENT_SEQ_DIAG 0x05
-+#define DA7280_IRQ_STATUS1 0x06
-+#define DA7280_IRQ_MASK1 0x07
-+#define DA7280_FRQ_LRA_PER_H 0x0A
-+#define DA7280_FRQ_LRA_PER_L 0x0B
-+#define DA7280_ACTUATOR1 0x0C
-+#define DA7280_ACTUATOR2 0x0D
-+#define DA7280_ACTUATOR3 0x0E
-+#define DA7280_CALIB_V2I_H 0x0F
-+#define DA7280_CALIB_V2I_L 0x10
-+#define DA7280_TOP_CFG1 0x13
-+#define DA7280_TOP_CFG2 0x14
-+#define DA7280_TOP_CFG4 0x16
-+#define DA7280_TOP_INT_CFG1 0x17
-+#define DA7280_TOP_CTL1 0x22
-+#define DA7280_TOP_CTL2 0x23
-+#define DA7280_SEQ_CTL2 0x28
-+#define DA7280_GPI_0_CTL 0x29
-+#define DA7280_GPI_1_CTL 0x2A
-+#define DA7280_GPI_2_CTL 0x2B
-+#define DA7280_MEM_CTL1 0x2C
-+#define DA7280_MEM_CTL2 0x2D
-+#define DA7280_TOP_CFG5 0x6E
-+#define DA7280_IRQ_MASK2 0x83
-+#define DA7280_SNP_MEM_99 0xE7
-+
-+/* Register field */
-+
-+/* DA7280_IRQ_EVENT1 (Address 0x03) */
-+#define DA7280_E_SEQ_CONTINUE_SHIFT 0
-+#define DA7280_E_SEQ_CONTINUE_MASK BIT(0)
-+#define DA7280_E_UVLO_SHIFT 1
-+#define DA7280_E_UVLO_MASK BIT(1)
-+#define DA7280_E_SEQ_DONE_SHIFT 2
-+#define DA7280_E_SEQ_DONE_MASK BIT(2)
-+#define DA7280_E_OVERTEMP_CRIT_SHIFT 3
-+#define DA7280_E_OVERTEMP_CRIT_MASK BIT(3)
-+#define DA7280_E_SEQ_FAULT_SHIFT 4
-+#define DA7280_E_SEQ_FAULT_MASK BIT(4)
-+#define DA7280_E_WARNING_SHIFT 5
-+#define DA7280_E_WARNING_MASK BIT(5)
-+#define DA7280_E_ACTUATOR_FAULT_SHIFT 6
-+#define DA7280_E_ACTUATOR_FAULT_MASK BIT(6)
-+#define DA7280_E_OC_FAULT_SHIFT 7
-+#define DA7280_E_OC_FAULT_MASK BIT(7)
-+
-+/* DA7280_IRQ_EVENT_WARNING_DIAG (Address 0x04) */
-+#define DA7280_E_OVERTEMP_WARN_SHIFT 3
-+#define DA7280_E_OVERTEMP_WARN_MASK BIT(3)
-+#define DA7280_E_MEM_TYPE_SHIFT 4
-+#define DA7280_E_MEM_TYPE_MASK BIT(4)
-+#define DA7280_E_LIM_DRIVE_ACC_SHIFT 6
-+#define DA7280_E_LIM_DRIVE_ACC_MASK BIT(6)
-+#define DA7280_E_LIM_DRIVE_SHIFT 7
-+#define DA7280_E_LIM_DRIVE_MASK BIT(7)
-+
-+/* DA7280_IRQ_EVENT_PAT_DIAG (Address 0x05) */
-+#define DA7280_E_PWM_FAULT_SHIFT 5
-+#define DA7280_E_PWM_FAULT_MASK BIT(5)
-+#define DA7280_E_MEM_FAULT_SHIFT 6
-+#define DA7280_E_MEM_FAULT_MASK BIT(6)
-+#define DA7280_E_SEQ_ID_FAULT_SHIFT 7
-+#define DA7280_E_SEQ_ID_FAULT_MASK BIT(7)
-+
-+/* DA7280_IRQ_STATUS1 (Address 0x06) */
-+#define DA7280_STA_SEQ_CONTINUE_SHIFT 0
-+#define DA7280_STA_SEQ_CONTINUE_MASK BIT(0)
-+#define DA7280_STA_UVLO_VBAT_OK_SHIFT 1
-+#define DA7280_STA_UVLO_VBAT_OK_MASK BIT(1)
-+#define DA7280_STA_SEQ_DONE_SHIFT 2
-+#define DA7280_STA_SEQ_DONE_MASK BIT(2)
-+#define DA7280_STA_OVERTEMP_CRIT_SHIFT 3
-+#define DA7280_STA_OVERTEMP_CRIT_MASK BIT(3)
-+#define DA7280_STA_SEQ_FAULT_SHIFT 4
-+#define DA7280_STA_SEQ_FAULT_MASK BIT(4)
-+#define DA7280_STA_WARNING_SHIFT 5
-+#define DA7280_STA_WARNING_MASK BIT(5)
-+#define DA7280_STA_ACTUATOR_SHIFT 6
-+#define DA7280_STA_ACTUATOR_MASK BIT(6)
-+#define DA7280_STA_OC_SHIFT 7
-+#define DA7280_STA_OC_MASK BIT(7)
-+
-+/* DA7280_IRQ_MASK1 (Address 0x07) */
-+#define DA7280_SEQ_CONTINUE_M_SHIFT 0
-+#define DA7280_SEQ_CONTINUE_M_MASK BIT(0)
-+#define DA7280_E_UVLO_M_SHIFT 1
-+#define DA7280_E_UVLO_M_MASK BIT(1)
-+#define DA7280_SEQ_DONE_M_SHIFT 2
-+#define DA7280_SEQ_DONE_M_MASK BIT(2)
-+#define DA7280_OVERTEMP_CRIT_M_SHIFT 3
-+#define DA7280_OVERTEMP_CRIT_M_MASK BIT(3)
-+#define DA7280_SEQ_FAULT_M_SHIFT 4
-+#define DA7280_SEQ_FAULT_M_MASK BIT(4)
-+#define DA7280_WARNING_M_SHIFT 5
-+#define DA7280_WARNING_M_MASK BIT(5)
-+#define DA7280_ACTUATOR_M_SHIFT 6
-+#define DA7280_ACTUATOR_M_MASK BIT(6)
-+#define DA7280_OC_M_SHIFT 7
-+#define DA7280_OC_M_MASK BIT(7)
-+
-+/* DA7280_ACTUATOR3 (Address 0x0e) */
-+#define DA7280_IMAX_MASK (31 << 0)
-+
-+/* DA7280_TOP_CFG1 (Address 0x13) */
-+#define DA7280_AMP_PID_EN_SHIFT 0
-+#define DA7280_AMP_PID_EN_MASK BIT(0)
-+#define DA7280_RAPID_STOP_EN_SHIFT 1
-+#define DA7280_RAPID_STOP_EN_MASK BIT(1)
-+#define DA7280_ACCELERATION_EN_SHIFT 2
-+#define DA7280_ACCELERATION_EN_MASK BIT(2)
-+#define DA7280_FREQ_TRACK_EN_SHIFT 3
-+#define DA7280_FREQ_TRACK_EN_MASK BIT(3)
-+#define DA7280_BEMF_SENSE_EN_SHIFT 4
-+#define DA7280_BEMF_SENSE_EN_MASK BIT(4)
-+#define DA7280_ACTUATOR_TYPE_SHIFT 5
-+#define DA7280_ACTUATOR_TYPE_MASK BIT(5)
-+
-+/* DA7280_TOP_CFG2 (Address 0x14) */
-+#define DA7280_FULL_BRAKE_THR_SHIFT 0
-+#define DA7280_FULL_BRAKE_THR_MASK (15 << 0)
-+#define DA7280_MEM_DATA_SIGNED_SHIFT 4
-+#define DA7280_MEM_DATA_SIGNED_MASK BIT(4)
-+
-+/* DA7280_TOP_CFG4 (Address 0x16) */
-+#define DA7280_TST_CALIB_IMPEDANCE_DIS_SHIFT 6
-+#define DA7280_TST_CALIB_IMPEDANCE_DIS_MASK BIT(6)
-+#define DA7280_V2I_FACTOR_FREEZE_SHIFT 7
-+#define DA7280_V2I_FACTOR_FREEZE_MASK BIT(7)
-+
-+/* DA7280_TOP_INT_CFG1 (Address 0x17) */
-+#define DA7280_BEMF_FAULT_LIM_SHIFT 0
-+#define DA7280_BEMF_FAULT_LIM_MASK (3 << 0)
-+
-+/* DA7280_TOP_CTL1 (Address 0x22) */
-+#define DA7280_OPERATION_MODE_SHIFT 0
-+#define DA7280_OPERATION_MODE_MASK (7 << 0)
-+#define DA7280_STANDBY_EN_SHIFT 3
-+#define DA7280_STANDBY_EN_MASK BIT(3)
-+#define DA7280_SEQ_START_SHIFT 4
-+#define DA7280_SEQ_START_MASK BIT(4)
-+
-+/* DA7280_SEQ_CTL2 (Address 0x28) */
-+#define DA7280_PS_SEQ_ID_SHIFT 0
-+#define DA7280_PS_SEQ_ID_MASK (15 << 0)
-+#define DA7280_PS_SEQ_LOOP_SHIFT 4
-+#define DA7280_PS_SEQ_LOOP_MASK (15 << 4)
-+
-+/* DA7280_GPIO_0_CTL (Address 0x29) */
-+#define DA7280_GPI0_POLARITY_SHIFT 0
-+#define DA7280_GPI0_MODE_SHIFT 2
-+#define DA7280_GPI0_SEQUENCE_ID_SHIFT 3
-+#define DA7280_GPI0_SEQUENCE_ID_MASK (15 << 3)
-+
-+/* DA7280_GPIO_1_CTL (Address 0x2a) */
-+#define DA7280_GPI1_SEQUENCE_ID_SHIFT 3
-+#define DA7280_GPI1_SEQUENCE_ID_MASK (15 << 3)
-+
-+/* DA7280_GPIO_2_CTL (Address 0x2b) */
-+#define DA7280_GPI2_SEQUENCE_ID_SHIFT 3
-+#define DA7280_GPI2_SEQUENCE_ID_MASK (15 << 3)
-+
-+/* DA7280_MEM_CTL2 (Address 0x2d) */
-+#define DA7280_WAV_MEM_LOCK_MASK BIT(7)
-+
-+/* DA7280_TOP_CFG5 (Address 0x6e) */
-+#define DA7280_V2I_FACTOR_OFFSET_EN_MASK BIT(0)
-+
-+/* DA7280_IRQ_MASK2 (Address 0x83) */
-+#define DA7280_ADC_SAT_M_MASK BIT(7)
-+
-+/* Controls */
-+
++#include "da7280.h"
++
++/* uV unit for voltage rate */
+#define DA7280_VOLTAGE_RATE_MAX 6000000
+#define DA7280_VOLTAGE_RATE_STEP 23400
+#define DA7280_NOMMAX_DFT 0x6B
@@ -276,6 +98,7 @@
+#define DA7280_IMPD_DEFAULT 22000000
+
+#define DA7280_IMAX_DEFAULT 0x0E
++/* uA unit step and limit for IMAX*/
+#define DA7280_IMAX_STEP 7200
+#define DA7280_IMAX_LIMIT 252000
+
@@ -288,7 +111,7 @@
+
+#define DA7280_SEQ_ID_MAX 15
+#define DA7280_SEQ_LOOP_MAX 15
-+#define DA7280_GPI_SEQ_ID_DFT 0x0
++#define DA7280_GPI1_SEQ_ID_DEFT 0x0
+
+#define DA7280_SNP_MEM_SIZE 100
+#define DA7280_SNP_MEM_MAX DA7280_SNP_MEM_99
@@ -298,9 +121,6 @@
+#define DA7280_SKIP_INIT 0x100
+
+#define DA7280_FF_EFFECT_COUNT_MAX 15
-+
-+/* Maximum gain is 0x7fff for PWM mode */
-+#define MAX_MAGNITUDE_SHIFT 15
+
+enum da7280_haptic_dev_t {
+ DA7280_LRA = 0,
@@ -346,12 +166,12 @@
+ struct pwm_device *pwm_dev;
+
+ bool legacy;
++ int pwm_id;
+ struct delayed_work work_duration;
+ struct work_struct work_playback;
+ struct work_struct work_setgain;
+ int val;
+ u16 gain;
-+ u16 new_gain;
+
+ s16 level;
+
@@ -444,41 +264,38 @@
+ haptics->snp_mem, DA7280_SNP_MEM_MAX - val + 1);
+}
+
-+static int da7280_haptic_set_pwm(struct da7280_haptic *haptics, bool enabled)
-+{
-+ struct pwm_state state;
++static int da7280_haptic_set_pwm(struct da7280_haptic *haptics)
++{
++ struct pwm_args pargs;
+ u64 period_mag_multi;
++ unsigned int pwm_duty;
+ int error;
+
-+ if (!haptics->gain) {
++ pwm_get_args(haptics->pwm_dev, &pargs);
++ period_mag_multi =
++ (u64)(pargs.period * haptics->gain);
++ if (haptics->acc_en)
++ pwm_duty =
++ (unsigned int)(period_mag_multi >> 16);
++ else
++ pwm_duty =
++ (unsigned int)((period_mag_multi >> 16)
++ + pargs.period) / 2;
++
++ error = pwm_config(haptics->pwm_dev,
++ pwm_duty, pargs.period);
++ if (error) {
+ dev_err(haptics->dev,
-+ "Please set the gain first for the pwm mode\n");
-+ return -EINVAL;
-+ }
-+
-+ pwm_get_state(haptics->pwm_dev, &state);
-+ state.enabled = enabled;
-+ if (enabled) {
-+ period_mag_multi = state.period * haptics->gain;
-+ period_mag_multi >>= MAX_MAGNITUDE_SHIFT;
-+
-+ /* The interpretation of duty cycle depends on the acc_en,
-+ * it should be between 50% and 100% for acc_en = 0.
-+ * See datasheet 'PWM mode' section.
-+ */
-+ if (!haptics->acc_en) {
-+ period_mag_multi += state.period;
-+ period_mag_multi /= 2;
-+ }
-+
-+ state.duty_cycle = period_mag_multi;
-+ }
-+
-+ error = pwm_apply_state(haptics->pwm_dev, &state);
-+ if (error)
++ "failed to configure pwm : %d\n", error);
++ return error;
++ }
++
++ error = pwm_enable(haptics->pwm_dev);
++ if (error) {
++ pwm_disable(haptics->pwm_dev);
+ dev_err(haptics->dev,
-+ "failed to apply pwm state: %pE\n",
-+ ERR_PTR(error));
++ "failed to enable haptics pwm device : %d\n", error);
++ }
+
+ return error;
+}
@@ -506,13 +323,13 @@
+ haptics->level);
+ if (error) {
+ dev_err(haptics->dev,
-+ "i2c err %pE for driving level (%d)\n",
-+ ERR_PTR(error), haptics->level);
++ "i2c err (%d) for driving level (%d)\n",
++ error, haptics->level);
+ return;
+ }
+ break;
+ case DA7280_PWM_MODE:
-+ if (da7280_haptic_set_pwm(haptics, true))
++ if (da7280_haptic_set_pwm(haptics))
+ return;
+ break;
+ case DA7280_RTWM_MODE:
@@ -538,8 +355,7 @@
+ haptics->op_mode);
+ if (error) {
+ dev_err(haptics->dev,
-+ "i2c err for op_mode setting : %pE\n",
-+ ERR_PTR(error));
++ "i2c err for op_mode setting : %d\n", error);
+ return;
+ }
+
@@ -551,14 +367,14 @@
+ DA7280_SEQ_START_MASK);
+ if (error) {
+ dev_err(haptics->dev,
-+ "i2c err for sequence triggering : %pE\n",
-+ ERR_PTR(error));
++ "i2c err for sequence triggering : %d\n",
++ error);
+ return;
+ }
+ }
+
+ haptics->enabled = true;
-+ if (haptics->length_ms && haptics->op_mode <= DA7280_PWM_MODE)
++ if (haptics->length_ms && haptics->op_mode == DA7280_DRO_MODE)
+ schedule_delayed_work(&haptics->work_duration,
+ msecs_to_jiffies(haptics->length_ms));
+}
@@ -576,7 +392,7 @@
+ DA7280_OPERATION_MODE_MASK, 0);
+ if (error) {
+ dev_err(haptics->dev,
-+ "i2c err for op_mode off : %pE\n", ERR_PTR(error));
++ "i2c err for op_mode off : %d\n", error);
+ return;
+ }
+
@@ -586,14 +402,13 @@
+ DA7280_TOP_CTL2, 0);
+ if (error) {
+ dev_err(haptics->dev,
-+ "i2c err for DRO mode off : %pE\n",
-+ ERR_PTR(error));
++ "i2c err for DRO mode off : %d\n",
++ error);
+ return;
+ }
+ break;
+ case DA7280_PWM_MODE:
-+ if (da7280_haptic_set_pwm(haptics, false))
-+ return;
++ pwm_disable(haptics->pwm_dev);
+ break;
+ case DA7280_RTWM_MODE:
+ case DA7280_ETWM_MODE:
@@ -602,8 +417,8 @@
+ DA7280_SEQ_START_MASK, 0);
+ if (error) {
+ dev_err(haptics->dev,
-+ "i2c err for RTWM or ETWM mode off: %pE\n",
-+ ERR_PTR(error));
++ "i2c err for RTWM or ETWM mode off : %d\n",
++ error);
+ return;
+ }
+ break;
@@ -640,11 +455,14 @@
+{
+ struct da7280_haptic *haptics =
+ container_of(work, struct da7280_haptic, work_setgain);
-+ u16 gain = haptics->new_gain;
++ u16 gain = haptics->gain;
+ int error = 0;
+
+ if (gain == 0)
+ return;
++
++ if (gain > 0x7fff)
++ gain = 0x7fff;
+
+ /* DRO and PWM modes support set_gain feature
+ */
@@ -672,15 +490,15 @@
+ haptics->level);
+ if (error) {
+ dev_err(haptics->dev,
-+ "i2c err for driving level set: %pE\n",
-+ ERR_PTR(error));
++ "i2c err for driving level set : %d\n",
++ error);
+ return;
+ }
+ break;
+ case DA7280_PWM_MODE:
+ haptics->gain = gain;
+ if (haptics->enabled) {
-+ if (da7280_haptic_set_pwm(haptics, true))
++ if (da7280_haptic_set_pwm(haptics))
+ return;
+ }
+ break;
@@ -698,6 +516,7 @@
+{
+ struct da7280_haptic *haptics = input_get_drvdata(dev);
+ int error;
++ s16 level;
+ int tmp, i;
+ unsigned int val;
+ s16 data[DA7280_SNP_MEM_SIZE] = {0,};
@@ -706,41 +525,38 @@
+ /* DRO/PWM modes support this type */
+ case FF_CONSTANT:
+ haptics->op_mode = haptics->const_op_mode;
-+ /* effect->replay.length should be ms base */
-+ haptics->length_ms = effect->replay.length;
-+ if (haptics->op_mode == DA7280_DRO_MODE) {
-+ tmp = effect->u.constant.level * 254;
-+ haptics->level = tmp / 0x7FFF;
-+ break;
-+ }
-+
-+ haptics->gain = (effect->u.constant.level <= 0) ?
-+ 0 : effect->u.constant.level;
++ haptics->length_ms = effect->replay.length * MSEC_PER_SEC;
++ level = effect->u.constant.level;
++ tmp = level * 254;
++ haptics->level = tmp / 0x7FFF;
+ break;
+
+ /* RTWM/ETWM modes support this type */
+ case FF_PERIODIC:
+ if (effect->u.periodic.waveform != FF_CUSTOM) {
-+ dev_err(haptics->dev,
-+ "Only accept FF_CUSTOM type\n");
++ dev_err(haptics->dev, "Only accept FF_CUSTOM type\n");
+ return -EINVAL;
+ }
+
+ /*
-+ * Load the data and check the length.
-+ * the data will be patterns in this case: 3 < X <= 100,
-+ * and will be saved into the waveform memory inside DA728x.
-+ * If X = 2, the data will be PS_SEQ_ID and PS_SEQ_LOOP .
++ * Load the mem data and check the length.
++ * the data will be patterns in this case: 3 < X <= 100,
++ * they will be copied to memory inside DA728x.
++ * the data will be seq_ID and seq_loop values if X = 2.
+ */
+ if (effect->u.periodic.custom_len == DA7280_CUSTOM_DATA_LEN)
+ goto set_id_loop;
+
++ if (effect->u.periodic.custom_len > DA7280_CUSTOM_DATA_LEN &&
++ effect->u.periodic.custom_len <= DA7280_SNP_MEM_SIZE)
++ goto load_data;
++
++ /* If less than 2 or more than 100 then do nothing. */
+ if (effect->u.periodic.custom_len < DA7280_CUSTOM_DATA_LEN ||
-+ effect->u.periodic.custom_len > DA7280_SNP_MEM_SIZE) {
-+ dev_err(haptics->dev, "Invalid data size\n");
-+ return -EINVAL;
-+ }
-+
++ effect->u.periodic.custom_len <= DA7280_SNP_MEM_SIZE)
++ break;
++
++load_data:
+ if (copy_from_user(data, effect->u.periodic.custom_data,
+ sizeof(s16) *
+ effect->u.periodic.custom_len)) {
@@ -764,8 +580,8 @@
+ error = da7280_haptic_mem_update(haptics);
+ if (error) {
+ dev_err(haptics->dev,
-+ "mem update error: %pE\n",
-+ ERR_PTR(error));
++ "mem update error: %d\n",
++ error);
+ return error;
+ }
+ break;
@@ -796,8 +612,8 @@
+ DA7280_SEQ_CTL2, val);
+ if (error) {
+ dev_err(haptics->dev,
-+ "i2c err for driving level set: %pE\n",
-+ ERR_PTR(error));
++ "i2c err for driving level set : %d\n",
++ error);
+ return error;
+ }
+ break;
@@ -832,11 +648,7 @@
+{
+ struct da7280_haptic *haptics = input_get_drvdata(dev);
+
-+ if (gain > 0x7fff)
-+ gain = 0x7fff;
-+
-+ haptics->new_gain = gain;
-+
++ haptics->gain = gain;
+ schedule_work(&haptics->work_setgain);
+}
+
@@ -851,8 +663,7 @@
+ DA7280_STANDBY_EN_MASK);
+ if (error)
+ dev_err(haptics->dev,
-+ "Failed to open haptic, i2c error : %pE\n",
-+ ERR_PTR(error));
++ "Failed to open haptic, i2c error : %d\n", error);
+
+ return error;
+}
@@ -889,8 +700,7 @@
+ return;
+
+error_i2c:
-+ dev_err(haptics->dev, "DA7280-haptic i2c error : %pE\n",
-+ ERR_PTR(error));
++ dev_err(haptics->dev, "DA7280-haptic i2c error : %d\n", error);
+}
+
+static u8 da7280_haptic_of_mode_str(struct device *dev,
@@ -1055,10 +865,10 @@
+ haptics->gpi_ctl[i].seq_id = val;
+ else
+ haptics->gpi_ctl[i].seq_id =
-+ DA7280_GPI_SEQ_ID_DFT + i;
++ DA7280_GPI1_SEQ_ID_DEFT + i;
+ else /* if no property, then do nothing */
+ haptics->gpi_ctl[i].seq_id =
-+ DA7280_GPI_SEQ_ID_DFT + i;
++ DA7280_GPI1_SEQ_ID_DEFT + i;
+
+ gpi_str2[7] = '0' + i;
+ if (!device_property_read_string(dev, gpi_str2, &str))
@@ -1145,10 +955,8 @@
+ if (events[1] & DA7280_E_LIM_DRIVE_MASK ||
+ events[1] & DA7280_E_LIM_DRIVE_ACC_MASK)
+ dev_warn(dev, "Please reduce the driver level\n");
-+ if (events[1] & DA7280_E_MEM_TYPE_MASK)
-+ dev_warn(dev, "Please check the mem data format\n");
-+ if (events[1] & DA7280_E_OVERTEMP_WARN_MASK)
-+ dev_warn(dev, "Over-temperature warning\n");
++ if (events[1] & DA7280_E_LIM_DRIVE_ACC_MASK)
++ dev_warn(dev, "Please Check the mem data format\n");
+ }
+
+ if (events[0] & DA7280_E_SEQ_FAULT_MASK) {
@@ -1163,7 +971,7 @@
+ return IRQ_HANDLED;
+
+error_i2c:
-+ dev_err(dev, "da7280 i2c error : %pE\n", ERR_PTR(error));
++ dev_err(dev, "da7280 i2c error : %d\n", error);
+ return IRQ_NONE;
+}
+
@@ -1334,14 +1142,6 @@
+ goto error_i2c;
+ }
+
-+ /* Mask ADC_SAT_M bit as default */
-+ error = regmap_update_bits(haptics->regmap,
-+ DA7280_IRQ_MASK2,
-+ DA7280_ADC_SAT_M_MASK,
-+ DA7280_ADC_SAT_M_MASK);
-+ if (error)
-+ goto error_i2c;
-+
+ /* Clear Interrupts */
+ error = regmap_write(haptics->regmap, DA7280_IRQ_EVENT1, 0xff);
+ if (error)
@@ -1358,8 +1158,7 @@
+ return 0;
+
+error_i2c:
-+ dev_err(haptics->dev,
-+ "haptic init - I2C error : %pE\n", ERR_PTR(error));
++ dev_err(haptics->dev, "haptic init - I2C error : %d\n", error);
+ return error;
+}
+
@@ -1389,8 +1188,7 @@
+ (val & 0xf) >> DA7280_PS_SEQ_ID_SHIFT);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to update register : %pE\n",
-+ ERR_PTR(error));
++ "failed to update register : %d\n", error);
+ return error;
+ }
+
@@ -1414,8 +1212,7 @@
+ error = regmap_read(haptics->regmap, DA7280_SEQ_CTL2, &val);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to read register : %pE\n",
-+ ERR_PTR(error));
++ "failed to read register : %d\n", error);
+ return error;
+ }
+ val = (val & DA7280_PS_SEQ_ID_MASK)
@@ -1450,8 +1247,7 @@
+ (val & 0xF) << DA7280_PS_SEQ_LOOP_SHIFT);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to update register : %pE\n",
-+ ERR_PTR(error));
++ "failed to update register : %d\n", error);
+ return error;
+ }
+
@@ -1474,8 +1270,7 @@
+ error = regmap_read(haptics->regmap, DA7280_SEQ_CTL2, &val);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to read register : %pE\n",
-+ ERR_PTR(error));
++ "failed to read register : %d\n", error);
+ return error;
+ }
+ val = (val & DA7280_PS_SEQ_LOOP_MASK)
@@ -1514,8 +1309,7 @@
+ << DA7280_GPI0_SEQUENCE_ID_SHIFT);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to update register : %pE\n",
-+ ERR_PTR(error));
++ "failed to update register : %d\n", error);
+ return error;
+ }
+
@@ -1539,8 +1333,7 @@
+ error = regmap_read(haptics->regmap, DA7280_GPI_0_CTL, &val);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to read register : %pE\n",
-+ ERR_PTR(error));
++ "failed to read register : %d\n", error);
+ return error;
+ }
+ val = (val & DA7280_GPI0_SEQUENCE_ID_MASK)
@@ -1571,8 +1364,7 @@
+ << DA7280_GPI1_SEQUENCE_ID_SHIFT);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to update register : %pE\n",
-+ ERR_PTR(error));
++ "failed to update register : %d\n", error);
+ return error;
+ }
+
@@ -1596,8 +1388,7 @@
+ error = regmap_read(haptics->regmap, DA7280_GPI_1_CTL, &val);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to read register : %pE\n",
-+ ERR_PTR(error));
++ "failed to read register : %d\n", error);
+ return error;
+ }
+ val = (val & DA7280_GPI1_SEQUENCE_ID_MASK)
@@ -1628,8 +1419,7 @@
+ << DA7280_GPI2_SEQUENCE_ID_SHIFT);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to update register : %pE\n",
-+ ERR_PTR(error));
++ "failed to update register : %d\n", error);
+ return error;
+ }
+
@@ -1653,8 +1443,7 @@
+ error = regmap_read(haptics->regmap, DA7280_GPI_2_CTL, &val);
+ if (error) {
+ dev_err(haptics->dev,
-+ "failed to read register : %pE\n",
-+ ERR_PTR(error));
++ "failed to read register : %d\n", error);
+ return error;
+ }
+ val = (val & DA7280_GPI2_SEQUENCE_ID_MASK)
@@ -1780,7 +1569,6 @@
+ struct da7280_haptic *haptics;
+ struct input_dev *input_dev;
+ struct ff_device *ff;
-+ struct pwm_state state;
+ unsigned int period2freq;
+ int error;
+
@@ -1794,31 +1582,24 @@
+ return -EINVAL;
+ }
+
-+ da7280_parse_properties(dev, haptics);
++ da7280_parse_properties(&client->dev, haptics);
+
+ if (haptics->const_op_mode == DA7280_PWM_MODE) {
-+ haptics->pwm_dev = devm_pwm_get(dev, NULL);
++ /* Get pwm and regulatot for haptics device */
++ haptics->pwm_dev = devm_pwm_get(&client->dev, NULL);
+ if (IS_ERR(haptics->pwm_dev)) {
-+ error = PTR_ERR(haptics->pwm_dev);
-+ if (error != -EPROBE_DEFER)
-+ dev_err(dev, "unable to request PWM: %pE\n",
-+ ERR_PTR(error));
-+ return error;
++ dev_err(dev, "failed to get PWM device\n");
++ return PTR_ERR(haptics->pwm_dev);
+ }
+
-+ /* Sync up PWM state and ensure it is off. */
-+ pwm_init_state(haptics->pwm_dev, &state);
-+ state.enabled = false;
-+ error = pwm_apply_state(haptics->pwm_dev, &state);
-+ if (error) {
-+ dev_err(dev,
-+ "failed to apply initial PWM state: %pE\n",
-+ ERR_PTR(error));
-+ return error;
-+ }
++ /*
++ * FIXME: pwm_apply_args() should be removed when switching to
++ * the atomic PWM API.
++ */
++ pwm_apply_args(haptics->pwm_dev);
+
+ /* Check PWM Period, it must be in 10k ~ 250kHz */
-+ period2freq = 1000000 / state.period;
++ period2freq = 1000000 / pwm_get_period(haptics->pwm_dev);
+ if (period2freq < DA7280_MIN_PWM_FREQ_KHZ ||
+ period2freq > DA7280_MAX_PWM_FREQ_KHZ) {
+ dev_err(dev, "Not supported PWM frequency(%d)\n",
@@ -1838,8 +1619,8 @@
+ devm_regmap_init_i2c(client, &da7280_haptic_regmap_config);
+ if (IS_ERR(haptics->regmap)) {
+ error = PTR_ERR(haptics->regmap);
-+ dev_err(dev, "Failed to allocate register map : %pE\n",
-+ ERR_PTR(error));
++ dev_err(dev, "Failed to allocate register map : %d\n",
++ error);
+ return error;
+ }
+
@@ -1870,8 +1651,8 @@
+
+ error = input_ff_create(haptics->input_dev, DA7280_FF_EFFECT_COUNT_MAX);
+ if (error) {
-+ dev_err(dev, "create FF input device failed: %pE\n",
-+ ERR_PTR(error));
++ dev_err(dev, "create FF input device failed(%d)\n",
++ error);
+ return error;
+ }
+
@@ -1888,8 +1669,8 @@
+
+ error = devm_device_add_group(dev, &da7280_attr_group);
+ if (error) {
-+ dev_err(dev, "Failed to create sysfs attributes: %pE\n",
-+ ERR_PTR(error));
++ dev_err(dev, "Failed to create sysfs attributes: %d\n",
++ error);
+ return error;
+ }
+
@@ -1917,7 +1698,7 @@
+ DA7280_STANDBY_EN_MASK, 0);
+ if (error)
+ dev_err(haptics->dev,
-+ "I2C error : %pE\n", ERR_PTR(error));
++ "I2C error : %d\n", error);
+
+ mutex_unlock(&haptics->input_dev->mutex);
+ return error;
@@ -1936,7 +1717,7 @@
+ DA7280_STANDBY_EN_MASK);
+ if (error)
+ dev_err(haptics->dev,
-+ "i2c error : %pE\n", ERR_PTR(error));
++ "i2c error : %d\n", error);
+
+ mutex_unlock(&haptics->input_dev->mutex);
+ return error;
@@ -1971,6 +1752,424 @@
+MODULE_DESCRIPTION("DA7280 haptics driver");
+MODULE_AUTHOR("Roy Im <Roy.Im.Opensource@diasemi.com>");
+MODULE_LICENSE("GPL");
+diff --git a/drivers/input/misc/da7280.h b/drivers/input/misc/da7280.h
+new file mode 100644
+index 0000000..b234e62
+--- /dev/null
++++ b/drivers/input/misc/da7280.h
+@@ -0,0 +1,412 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * DA7280 Haptic device driver registers
++ *
++ * Copyright (c) 2019 Dialog Semiconductor.
++ * Author: Roy Im <Roy.Im.Opensource@diasemi.com>
++ */
++
++#ifndef _DA7280_REG_DEFS_H
++#define _DA7280_REG_DEFS_H
++
++#include <linux/bitops.h>
++
++/* Registers */
++
++#define DA7280_CHIP_REV 0x00
++#define DA7280_IRQ_EVENT1 0x03
++#define DA7280_IRQ_EVENT_WARNING_DIAG 0x04
++#define DA7280_IRQ_EVENT_SEQ_DIAG 0x05
++#define DA7280_IRQ_STATUS1 0x06
++#define DA7280_IRQ_MASK1 0x07
++#define DA7280_CIF_I2C1 0x08
++#define DA7280_FRQ_LRA_PER_H 0x0A
++#define DA7280_FRQ_LRA_PER_L 0x0B
++#define DA7280_ACTUATOR1 0x0C
++#define DA7280_ACTUATOR2 0x0D
++#define DA7280_ACTUATOR3 0x0E
++#define DA7280_CALIB_V2I_H 0x0F
++#define DA7280_CALIB_V2I_L 0x10
++#define DA7280_CALIB_IMP_H 0x11
++#define DA7280_CALIB_IMP_L 0x12
++#define DA7280_TOP_CFG1 0x13
++#define DA7280_TOP_CFG2 0x14
++#define DA7280_TOP_CFG3 0x15
++#define DA7280_TOP_CFG4 0x16
++#define DA7280_TOP_INT_CFG1 0x17
++#define DA7280_TOP_INT_CFG6_H 0x1C
++#define DA7280_TOP_INT_CFG6_L 0x1D
++#define DA7280_TOP_INT_CFG7_H 0x1E
++#define DA7280_TOP_INT_CFG7_L 0x1F
++#define DA7280_TOP_INT_CFG8 0x20
++#define DA7280_TOP_CTL1 0x22
++#define DA7280_TOP_CTL2 0x23
++#define DA7280_SEQ_CTL1 0x24
++#define DA7280_SWG_C1 0x25
++#define DA7280_SWG_C2 0x26
++#define DA7280_SWG_C3 0x27
++#define DA7280_SEQ_CTL2 0x28
++#define DA7280_GPI_0_CTL 0x29
++#define DA7280_GPI_1_CTL 0x2A
++#define DA7280_GPI_2_CTL 0x2B
++#define DA7280_MEM_CTL1 0x2C
++#define DA7280_MEM_CTL2 0x2D
++#define DA7280_ADC_DATA_H1 0x2E
++#define DA7280_ADC_DATA_L1 0x2F
++#define DA7280_POLARITY 0x43
++#define DA7280_LRA_AVR_H 0x44
++#define DA7280_LRA_AVR_L 0x45
++#define DA7280_FRQ_LRA_PER_ACT_H 0x46
++#define DA7280_FRQ_LRA_PER_ACT_L 0x47
++#define DA7280_FRQ_PHASE_H 0x48
++#define DA7280_FRQ_PHASE_L 0x49
++#define DA7280_FRQ_CTL 0x4C
++#define DA7280_TRIM3 0x5F
++#define DA7280_TRIM4 0x60
++#define DA7280_TRIM6 0x62
++#define DA7280_TOP_CFG5 0x6E
++#define DA7280_IRQ_EVENT_ACTUATOR_FAULT 0x81
++#define DA7280_IRQ_STATUS2 0x82
++#define DA7280_IRQ_MASK2 0x83
++#define DA7280_SNP_MEM_0 0x84
++#define DA7280_SNP_MEM_99 0xE7
++
++/* DA7280_CHIP_REV (Address 0x00) */
++#define DA7280_CHIP_REV_MAJOR_SHIFT 0
++#define DA7280_CHIP_REV_MAJOR_MASK (15 << 0)
++#define DA7280_CHIP_REV_MINOR_SHIFT 4
++#define DA7280_CHIP_REV_MINOR_MASK (15 << 4)
++
++/* DA7280_IRQ_EVENT1 (Address 0x03) */
++#define DA7280_E_SEQ_CONTINUE_SHIFT 0
++#define DA7280_E_SEQ_CONTINUE_MASK BIT(0)
++#define DA7280_E_UVLO_SHIFT 1
++#define DA7280_E_UVLO_MASK BIT(1)
++#define DA7280_E_SEQ_DONE_SHIFT 2
++#define DA7280_E_SEQ_DONE_MASK BIT(2)
++#define DA7280_E_OVERTEMP_CRIT_SHIFT 3
++#define DA7280_E_OVERTEMP_CRIT_MASK BIT(3)
++#define DA7280_E_SEQ_FAULT_SHIFT 4
++#define DA7280_E_SEQ_FAULT_MASK BIT(4)
++#define DA7280_E_WARNING_SHIFT 5
++#define DA7280_E_WARNING_MASK BIT(5)
++#define DA7280_E_ACTUATOR_FAULT_SHIFT 6
++#define DA7280_E_ACTUATOR_FAULT_MASK BIT(6)
++#define DA7280_E_OC_FAULT_SHIFT 7
++#define DA7280_E_OC_FAULT_MASK BIT(7)
++
++/* DA7280_IRQ_EVENT_WARNING_DIAG (Address 0x04) */
++#define DA7280_E_OVERTEMP_WARN_SHIFT 3
++#define DA7280_E_OVERTEMP_WARN_MASK BIT(3)
++#define DA7280_E_MEM_TYPE_SHIFT 4
++#define DA7280_E_MEM_TYPE_MASK BIT(4)
++#define DA7280_E_LIM_DRIVE_ACC_SHIFT 6
++#define DA7280_E_LIM_DRIVE_ACC_MASK BIT(6)
++#define DA7280_E_LIM_DRIVE_SHIFT 7
++#define DA7280_E_LIM_DRIVE_MASK BIT(7)
++
++/* DA7280_IRQ_EVENT_PAT_DIAG (Address 0x05) */
++#define DA7280_E_PWM_FAULT_SHIFT 5
++#define DA7280_E_PWM_FAULT_MASK BIT(5)
++#define DA7280_E_MEM_FAULT_SHIFT 6
++#define DA7280_E_MEM_FAULT_MASK BIT(6)
++#define DA7280_E_SEQ_ID_FAULT_SHIFT 7
++#define DA7280_E_SEQ_ID_FAULT_MASK BIT(7)
++
++/* DA7280_IRQ_STATUS1 (Address 0x06) */
++#define DA7280_STA_SEQ_CONTINUE_SHIFT 0
++#define DA7280_STA_SEQ_CONTINUE_MASK BIT(0)
++#define DA7280_STA_UVLO_VBAT_OK_SHIFT 1
++#define DA7280_STA_UVLO_VBAT_OK_MASK BIT(1)
++#define DA7280_STA_SEQ_DONE_SHIFT 2
++#define DA7280_STA_SEQ_DONE_MASK BIT(2)
++#define DA7280_STA_OVERTEMP_CRIT_SHIFT 3
++#define DA7280_STA_OVERTEMP_CRIT_MASK BIT(3)
++#define DA7280_STA_SEQ_FAULT_SHIFT 4
++#define DA7280_STA_SEQ_FAULT_MASK BIT(4)
++#define DA7280_STA_WARNING_SHIFT 5
++#define DA7280_STA_WARNING_MASK BIT(5)
++#define DA7280_STA_ACTUATOR_SHIFT 6
++#define DA7280_STA_ACTUATOR_MASK BIT(6)
++#define DA7280_STA_OC_SHIFT 7
++#define DA7280_STA_OC_MASK BIT(7)
++
++/* DA7280_IRQ_MASK1 (Address 0x07) */
++#define DA7280_SEQ_CONTINUE_M_SHIFT 0
++#define DA7280_SEQ_CONTINUE_M_MASK BIT(0)
++#define DA7280_E_UVLO_M_SHIFT 1
++#define DA7280_E_UVLO_M_MASK BIT(1)
++#define DA7280_SEQ_DONE_M_SHIFT 2
++#define DA7280_SEQ_DONE_M_MASK BIT(2)
++#define DA7280_OVERTEMP_CRIT_M_SHIFT 3
++#define DA7280_OVERTEMP_CRIT_M_MASK BIT(3)
++#define DA7280_SEQ_FAULT_M_SHIFT 4
++#define DA7280_SEQ_FAULT_M_MASK BIT(4)
++#define DA7280_WARNING_M_SHIFT 5
++#define DA7280_WARNING_M_MASK BIT(5)
++#define DA7280_ACTUATOR_M_SHIFT 6
++#define DA7280_ACTUATOR_M_MASK BIT(6)
++#define DA7280_OC_M_SHIFT 7
++#define DA7280_OC_M_MASK BIT(7)
++
++/* DA7280_CIF_I2C1 (Address 0x08) */
++#define DA7280_I2C_TO_ENABLE_SHIFT 6
++#define DA7280_I2C_TO_ENABLE_MASK BIT(6)
++#define DA7280_I2C_WR_MODE_SHIFT 7
++#define DA7280_I2C_WR_MODE_MASK BIT(7)
++
++/* DA7280_FRQ_LRA_PER_H (Address 0x0a) */
++#define DA7280_LRA_PER_H_SHIFT 0
++#define DA7280_LRA_PER_H_MASK (255 << 0)
++
++/* DA7280_FRQ_LRA_PER_L (Address 0x0b) */
++#define DA7280_LRA_PER_L_SHIFT 0
++#define DA7280_LRA_PER_L_MASK (127 << 0)
++
++/* DA7280_ACTUATOR1 (Address 0x0c) */
++#define DA7280_ACTUATOR_NOMMAX_SHIFT 0
++#define DA7280_ACTUATOR_NOMMAX_MASK (255 << 0)
++
++/* DA7280_ACTUATOR2 (Address 0x0d) */
++#define DA7280_ACTUATOR_ABSMAX_SHIFT 0
++#define DA7280_ACTUATOR_ABSMAX_MASK (255 << 0)
++
++/* DA7280_ACTUATOR3 (Address 0x0e) */
++#define DA7280_IMAX_SHIFT 0
++#define DA7280_IMAX_MASK (31 << 0)
++
++/* DA7280_CALIB_V2I_H (Address 0x0f) */
++#define DA7280_V2I_FACTOR_H_SHIFT 0
++#define DA7280_V2I_FACTOR_H_MASK (255 << 0)
++
++/* DA7280_CALIB_V2I_L (Address 0x10) */
++#define DA7280_V2I_FACTOR_L_SHIFT 0
++#define DA7280_V2I_FACTOR_L_MASK (255 << 0)
++
++/* DA7280_CALIB_IMP_H (Address 0x11) */
++#define DA7280_IMPEDANCE_H_SHIFT 0
++#define DA7280_IMPEDANCE_H_MASK (255 << 0)
++
++/* DA7280_CALIB_IMP_L (Address 0x12) */
++#define DA7280_IMPEDANCE_L_SHIFT 0
++#define DA7280_IMPEDANCE_L_MASK (3 << 0)
++
++/* DA7280_TOP_CFG1 (Address 0x13) */
++#define DA7280_AMP_PID_EN_SHIFT 0
++#define DA7280_AMP_PID_EN_MASK BIT(0)
++#define DA7280_RAPID_STOP_EN_SHIFT 1
++#define DA7280_RAPID_STOP_EN_MASK BIT(1)
++#define DA7280_ACCELERATION_EN_SHIFT 2
++#define DA7280_ACCELERATION_EN_MASK BIT(2)
++#define DA7280_FREQ_TRACK_EN_SHIFT 3
++#define DA7280_FREQ_TRACK_EN_MASK BIT(3)
++#define DA7280_BEMF_SENSE_EN_SHIFT 4
++#define DA7280_BEMF_SENSE_EN_MASK BIT(4)
++#define DA7280_ACTUATOR_TYPE_SHIFT 5
++#define DA7280_ACTUATOR_TYPE_MASK BIT(5)
++#define DA7280_EMBEDDED_MODE_SHIFT 7
++#define DA7280_EMBEDDED_MODE_MASK BIT(7)
++
++/* DA7280_TOP_CFG2 (Address 0x14) */
++#define DA7280_FULL_BRAKE_THR_SHIFT 0
++#define DA7280_FULL_BRAKE_THR_MASK (15 << 0)
++#define DA7280_MEM_DATA_SIGNED_SHIFT 4
++#define DA7280_MEM_DATA_SIGNED_MASK BIT(4)
++
++/* DA7280_TOP_CFG3 (Address 0x15) */
++#define DA7280_VDD_MARGIN_SHIFT 0
++#define DA7280_VDD_MARGIN_MASK (15 << 0)
++
++/* DA7280_TOP_CFG4 (Address 0x16) */
++#define DA7280_TST_CALIB_IMPEDANCE_DIS_SHIFT 6
++#define DA7280_TST_CALIB_IMPEDANCE_DIS_MASK BIT(6)
++#define DA7280_V2I_FACTOR_FREEZE_SHIFT 7
++#define DA7280_V2I_FACTOR_FREEZE_MASK BIT(7)
++
++/* DA7280_TOP_INT_CFG1 (Address 0x17) */
++#define DA7280_BEMF_FAULT_LIM_SHIFT 0
++#define DA7280_BEMF_FAULT_LIM_MASK (3 << 0)
++#define DA7280_FRQ_LOCKED_LIM_SHIFT 2
++#define DA7280_FRQ_LOCKED_LIM_MASK (63 << 2)
++
++/* DA7280_TOP_INT_CFG6_H (Address 0x1c) */
++#define DA7280_FRQ_PID_KP_H_SHIFT 0
++#define DA7280_FRQ_PID_KP_H_MASK (255 << 0)
++
++/* DA7280_TOP_INT_CFG6_L (Address 0x1d) */
++#define DA7280_FRQ_PID_KP_L_SHIFT 0
++#define DA7280_FRQ_PID_KP_L_MASK (255 << 0)
++
++/* DA7280_TOP_INT_CFG7_H (Address 0x1e) */
++#define DA7280_FRQ_PID_KI_H_SHIFT 0
++#define DA7280_FRQ_PID_KI_H_MASK (255 << 0)
++
++/* DA7280_TOP_INT_CFG7_L (Address 0x1f) */
++#define DA7280_FRQ_PID_KI_L_SHIFT 0
++#define DA7280_FRQ_PID_KI_L_MASK (255 << 0)
++
++/* DA7280_TOP_INT_CFG8 (Address 0x20) */
++#define DA7280_TST_FRQ_TRACK_BEMF_LIM_SHIFT 0
++#define DA7280_TST_FRQ_TRACK_BEMF_LIM_MASK (15 << 0)
++#define DA7280_TST_AMP_RAPID_STOP_LIM_SHIFT 4
++#define DA7280_TST_AMP_RAPID_STOP_LIM_MASK (7 << 4)
++
++/* DA7280_TOP_CTL1 (Address 0x22) */
++#define DA7280_OPERATION_MODE_SHIFT 0
++#define DA7280_OPERATION_MODE_MASK (7 << 0)
++#define DA7280_STANDBY_EN_SHIFT 3
++#define DA7280_STANDBY_EN_MASK BIT(3)
++#define DA7280_SEQ_START_SHIFT 4
++#define DA7280_SEQ_START_MASK BIT(4)
++
++/* DA7280_TOP_CTL2 (Address 0x23) */
++#define DA7280_OVERRIDE_VAL_SHIFT 0
++#define DA7280_OVERRIDE_VAL_MASK (255 << 0)
++
++/* DA7280_SEQ_CTL1 (Address 0x24) */
++#define DA7280_SEQ_CONTINUE_SHIFT 0
++#define DA7280_SEQ_CONTINUE_MASK BIT(0)
++#define DA7280_WAVEGEN_MODE_SHIFT 1
++#define DA7280_WAVEGEN_MODE_MASK BIT(1)
++#define DA7280_FREQ_WAVEFORM_TIMEBASE_SHIFT 2
++#define DA7280_FREQ_WAVEFORM_TIMEBASE_MASK BIT(2)
++
++/* DA7280_SWG_C1 (Address 0x25) */
++#define DA7280_CUSTOM_WAVE_GEN_COEFF1_SHIFT 0
++#define DA7280_CUSTOM_WAVE_GEN_COEFF1_MASK (255 << 0)
++
++/* DA7280_SWG_C2 (Address 0x26) */
++#define DA7280_CUSTOM_WAVE_GEN_COEFF2_SHIFT 0
++#define DA7280_CUSTOM_WAVE_GEN_COEFF2_MASK (255 << 0)
++
++/* DA7280_SWG_C3 (Address 0x27) */
++#define DA7280_CUSTOM_WAVE_GEN_COEFF3_SHIFT 0
++#define DA7280_CUSTOM_WAVE_GEN_COEFF3_MASK (255 << 0)
++
++/* DA7280_SEQ_CTL2 (Address 0x28) */
++#define DA7280_PS_SEQ_ID_SHIFT 0
++#define DA7280_PS_SEQ_ID_MASK (15 << 0)
++#define DA7280_PS_SEQ_LOOP_SHIFT 4
++#define DA7280_PS_SEQ_LOOP_MASK (15 << 4)
++
++/* DA7280_GPIO_0_CTL (Address 0x29) */
++#define DA7280_GPI0_POLARITY_SHIFT 0
++#define DA7280_GPI0_POLARITY_MASK (3 << 0)
++#define DA7280_GPI0_MODE_SHIFT 2
++#define DA7280_GPI0_MODE_MASK BIT(2)
++#define DA7280_GPI0_SEQUENCE_ID_SHIFT 3
++#define DA7280_GPI0_SEQUENCE_ID_MASK (15 << 3)
++
++/* DA7280_GPIO_1_CTL (Address 0x2a) */
++#define DA7280_GPI1_POLARITY_SHIFT 0
++#define DA7280_GPI1_POLARITY_MASK (3 << 0)
++#define DA7280_GPI1_MODE_SHIFT 2
++#define DA7280_GPI1_MODE_MASK BIT(2)
++#define DA7280_GPI1_SEQUENCE_ID_SHIFT 3
++#define DA7280_GPI1_SEQUENCE_ID_MASK (15 << 3)
++
++/* DA7280_GPIO_2_CTL (Address 0x2b) */
++#define DA7280_GPI2_POLARITY_SHIFT 0
++#define DA7280_GPI2_POLARITY_MASK (3 << 0)
++#define DA7280_GPI2_MODE_SHIFT 2
++#define DA7280_GPI2_MODE_MASK BIT(2)
++#define DA7280_GPI2_SEQUENCE_ID_SHIFT 3
++#define DA7280_GPI2_SEQUENCE_ID_MASK (15 << 3)
++
++/* DA7280_MEM_CTL1 (Address 0x2c) */
++#define DA7280_WAV_MEM_BASE_ADDR_SHIFT 0
++#define DA7280_WAV_MEM_BASE_ADDR_MASK (255 << 0)
++
++/* DA7280_MEM_CTL2 (Address 0x2d) */
++#define DA7280_WAV_MEM_LOCK_SHIFT 7
++#define DA7280_WAV_MEM_LOCK_MASK BIT(7)
++
++/* DA7280_ADC_DATA_H1 (Address 0x2e) */
++#define DA7280_ADC_VDD_H_SHIFT 0
++#define DA7280_ADC_VDD_H_MASK (255 << 0)
++
++/* DA7280_ADC_DATA_L1 (Address 0x2f) */
++#define DA7280_ADC_VDD_L_SHIFT 0
++#define DA7280_ADC_VDD_L_MASK (127 << 0)
++
++/* DA7280_POLARITY (Address 0x43) */
++#define DA7280_POLARITY_SHIFT 0
++#define DA7280_POLARITY_MASK BIT(0)
++
++/* DA7280_LRA_AVR_H (Address 0x44) */
++#define DA7280_LRA_PER_AVERAGE_H_SHIFT 0
++#define DA7280_LRA_PER_AVERAGE_H_MASK (255 << 0)
++
++/* DA7280_LRA_AVR_L (Address 0x45) */
++#define DA7280_LRA_PER_AVERAGE_L_SHIFT 0
++#define DA7280_LRA_PER_AVERAGE_L_MASK (127 << 0)
++
++/* DA7280_FRQ_LRA_PER_ACT_H (Address 0x46) */
++#define DA7280_LRA_PER_ACTUAL_H_SHIFT 0
++#define DA7280_LRA_PER_ACTUAL_H_MASK (255 << 0)
++
++/* DA7280_FRQ_LRA_PER_ACT_L (Address 0x47) */
++#define DA7280_LRA_PER_ACTUAL_L_SHIFT 0
++#define DA7280_LRA_PER_ACTUAL_L_MASK (127 << 0)
++
++/* DA7280_FRQ_PHASE_H (Address 0x48) */
++#define DA7280_DELAY_H_SHIFT 0
++#define DA7280_DELAY_H_MASK (255 << 0)
++
++/* DA7280_FRQ_PHASE_L (Address 0x49) */
++#define DA7280_DELAY_SHIFT_L_SHIFT 0
++#define DA7280_DELAY_SHIFT_L_MASK (7 << 0)
++#define DA7280_DELAY_FREEZE_SHIFT 7
++#define DA7280_DELAY_FREEZE_MASK BIT(7)
++
++/* DA7280_FRQ_CTL (Address 0x4c) */
++#define DA7280_FREQ_TRACKING_FORCE_ON_SHIFT 0
++#define DA7280_FREQ_TRACKING_FORCE_ON_MASK BIT(0)
++#define DA7280_FREQ_TRACKING_AUTO_ADJ_SHIFT 1
++#define DA7280_FREQ_TRACKING_AUTO_ADJ_MASK BIT(1)
++
++/* DA7280_TRIM3 (Address 0x5f) */
++#define DA7280_REF_UVLO_THRES_SHIFT 3
++#define DA7280_REF_UVLO_THRES_MASK (3 << 3)
++#define DA7280_LOOP_FILT_LOW_BW_SHIFT 5
++#define DA7280_LOOP_FILT_LOW_BW_MASK BIT(5)
++#define DA7280_LOOP_IDAC_DOUBLE_RANGE_SHIFT 6
++#define DA7280_LOOP_IDAC_DOUBLE_RANGE_MASK BIT(6)
++
++/* DA7280_TRIM4 (Address 0x60) */
++#define DA7280_LOOP_FILT_RES_TRIM_SHIFT 0
++#define DA7280_LOOP_FILT_RES_TRIM_MASK (3 << 0)
++#define DA7280_LOOP_FILT_CAP_TRIM_SHIFT 2
++#define DA7280_LOOP_FILT_CAP_TRIM_MASK (3 << 2)
++
++/* DA7280_TRIM6 (Address 0x62) */
++#define DA7280_HBRIDGE_ERC_HS_TRIM_SHIFT 0
++#define DA7280_HBRIDGE_ERC_HS_TRIM_MASK (3 << 0)
++#define DA7280_HBRIDGE_ERC_LS_TRIM_SHIFT 2
++#define DA7280_HBRIDGE_ERC_LS_TRIM_MASK (3 << 2)
++
++/* DA7280_TOP_CFG5 (Address 0x6e) */
++#define DA7280_V2I_FACTOR_OFFSET_EN_SHIFT 0
++#define DA7280_V2I_FACTOR_OFFSET_EN_MASK BIT(0)
++#define DA7280_FRQ_PAUSE_ON_POLARITY_CHANGE_SHIFT 1
++#define DA7280_FRQ_PAUSE_ON_POLARITY_CHANGE_MASK BIT(1)
++#define DA7280_DELAY_BYPASS_SHIFT 2
++#define DA7280_DELAY_BYPASS_MASK BIT(2)
++
++/* DA7280_IRQ_EVENT_ACTUATOR_FAULT (Address 0x81) */
++#define DA7280_ADC_SAT_FAULT_SHIFT 2
++#define DA7280_ADC_SAT_FAULT_MASK BIT(2)
++
++/* DA7280_IRQ_STATUS2 (Address 0x82) */
++#define DA7280_STA_ADC_SAT_SHIFT 7
++#define DA7280_STA_ADC_SAT_MASK BIT(7)
++
++/* DA7280_IRQ_MASK2 (Address 0x83) */
++#define DA7280_ADC_SAT_M_SHIFT 7
++#define DA7280_ADC_SAT_M_MASK BIT(7)
++
++/* DA7280_SNP_MEM_XX (Address 0x84 ~ 0xe7) */
++#define DA7280_SNP_MEM_SHIFT 0
++#define DA7280_SNP_MEM_MASK (255 << 0)
++
++#endif
--
-end-of-patch for PATCH V12
+end-of-patch for PATCH V8