[PATCH 0/3] Input: sun4i-lradc-keys: R329 and D1 support

This series adds R329 and D1 SoC support to the LRADC driver. These SoCs
do not change the register interface, only the platform integration.

I have another series[1] which adds wakeup support to this driver.
It has been reviewed/acked and is waiting to be merged for several
months[2]. That series merges cleanly with this one.

[1]: https://patchwork.kernel.org/project/linux-input/cover/20210805051241.47168-1-samuel@sholland.org/
[2]: https://patchwork.kernel.org/project/linux-input/cover/20210430042003.4591-1-samuel@sholland.org/

Samuel Holland (3):
  dt-bindings: input: sun4i-lradc-keys: Add R329 and D1 compatibles
  Input: sun4i-lradc-keys: Add optional clock/reset support
  Input: sun4i-lradc-keys: Add support for R329 and D1

 .../input/allwinner,sun4i-a10-lradc-keys.yaml | 22 +++++++++++++
 drivers/input/keyboard/sun4i-lradc-keys.c     | 31 +++++++++++++++++++
 2 files changed, 53 insertions(+)

-- 
2.31.1

Until the R329, the LRADC hardware was always active. Now it requires
enabling a clock gate and deasserting a reset line. Do this if the clock
and reset are provided in the device tree, but keep them optional to
maintain support for the existing binding.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 drivers/input/keyboard/sun4i-lradc-keys.c | 29 +++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/input/keyboard/sun4i-lradc-keys.c b/drivers/input/keyboard/sun4i-lradc-keys.c
index 4a796bed48ac..50fc18052829 100644
--- a/drivers/input/keyboard/sun4i-lradc-keys.c
+++ b/drivers/input/keyboard/sun4i-lradc-keys.c

@@ -14,6 +14,7 @@
  * there are no boards known to use channel 1.
  */
 
+#include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/input.h>

@@ -23,6 +24,7 @@
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
 #include <linux/regulator/consumer.h>
+#include <linux/reset.h>
 #include <linux/slab.h>
 
 #define LRADC_CTRL		0x00

@@ -83,6 +85,8 @@ struct sun4i_lradc_data {
 	struct device *dev;
 	struct input_dev *input;
 	void __iomem *base;
+	struct clk *clk;
+	struct reset_control *reset;
 	struct regulator *vref_supply;
 	struct sun4i_lradc_keymap *chan0_map;
 	const struct lradc_variant *variant;

@@ -140,6 +144,14 @@ static int sun4i_lradc_open(struct input_dev *dev)
 	if (error)
 		return error;
 
+	error = reset_control_deassert(lradc->reset);
+	if (error)
+		goto err_disable_reg;
+
+	error = clk_prepare_enable(lradc->clk);
+	if (error)
+		goto err_assert_reset;
+
 	lradc->vref = regulator_get_voltage(lradc->vref_supply) *
 		      lradc->variant->divisor_numerator /
 		      lradc->variant->divisor_denominator;

@@ -153,6 +165,13 @@ static int sun4i_lradc_open(struct input_dev *dev)
 	writel(CHAN0_KEYUP_IRQ | CHAN0_KEYDOWN_IRQ, lradc->base + LRADC_INTC);
 
 	return 0;
+
+err_assert_reset:
+	reset_control_assert(lradc->reset);
+err_disable_reg:
+	regulator_disable(lradc->vref_supply);
+
+	return error;
 }
 
 static void sun4i_lradc_close(struct input_dev *dev)

@@ -164,6 +183,8 @@ static void sun4i_lradc_close(struct input_dev *dev)
 		SAMPLE_RATE(2), lradc->base + LRADC_CTRL);
 	writel(0, lradc->base + LRADC_INTC);
 
+	clk_disable_unprepare(lradc->clk);
+	reset_control_assert(lradc->reset);
 	regulator_disable(lradc->vref_supply);
 }
 

@@ -243,6 +264,14 @@ static int sun4i_lradc_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
+	lradc->clk = devm_clk_get_optional(dev, NULL);
+	if (IS_ERR(lradc->clk))
+		return PTR_ERR(lradc->clk);
+
+	lradc->reset = devm_reset_control_get_optional_exclusive(dev, NULL);
+	if (IS_ERR(lradc->reset))
+		return PTR_ERR(lradc->reset);
+
 	lradc->vref_supply = devm_regulator_get(dev, "vref");
 	if (IS_ERR(lradc->vref_supply))
 		return PTR_ERR(lradc->vref_supply);

-- 
2.31.1

The R329 and D1 SoCs each contain an LRADC with a programming interface
compatible to earlier LRADCs. However, the LRADC now has its own clock
gate and reset line, instead of being always active.

To support this, add clock/reset properties to the binding, and require
them for the variant in the new SoCs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 .../input/allwinner,sun4i-a10-lradc-keys.yaml | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml
index cffd02028d02..cfb84b8a1b90 100644
--- a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml
+++ b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml

@@ -18,10 +18,20 @@ properties:
       - items:
           - const: allwinner,sun50i-a64-lradc
           - const: allwinner,sun8i-a83t-r-lradc
+      - const: allwinner,sun50i-r329-lradc
+      - items:
+          - const: allwinner,sun20i-d1-lradc
+          - const: allwinner,sun50i-r329-lradc
 
   reg:
     maxItems: 1
 
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
   interrupts:
     maxItems: 1
 

@@ -66,6 +76,18 @@ required:
   - interrupts
   - vref-supply
 
+if:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - allwinner,sun50i-r329-lradc
+
+then:
+  required:
+    - clocks
+    - resets
+
 additionalProperties: false
 
 examples:

-- 
2.31.1

This LRADC variant uses the same 3/4*AVCC reference voltage as the A83T
variant. The R329 and D1 LRADCs appear to be identical, so D1 support is
accomplished through having the R329 LRADC as a fallback compatible.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 drivers/input/keyboard/sun4i-lradc-keys.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/input/keyboard/sun4i-lradc-keys.c b/drivers/input/keyboard/sun4i-lradc-keys.c
index 50fc18052829..06e63c9560f9 100644
--- a/drivers/input/keyboard/sun4i-lradc-keys.c
+++ b/drivers/input/keyboard/sun4i-lradc-keys.c

@@ -319,6 +319,8 @@ static const struct of_device_id sun4i_lradc_of_match[] = {
 		.data = &lradc_variant_a10 },
 	{ .compatible = "allwinner,sun8i-a83t-r-lradc",
 		.data = &r_lradc_variant_a83t },
+	{ .compatible = "allwinner,sun50i-r329-lradc",
+		.data = &r_lradc_variant_a83t },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, sun4i_lradc_of_match);

-- 
2.31.1

On Tue, Sep 07, 2021 at 10:40:14PM -0500, Samuel Holland wrote:

The R329 and D1 SoCs each contain an LRADC with a programming interface
compatible to earlier LRADCs. However, the LRADC now has its own clock
gate and reset line, instead of being always active.

To support this, add clock/reset properties to the binding, and require
them for the variant in the new SoCs.

Signed-off-by: Samuel Holland <samuel@sholland.org>

Acked-by: Maxime Ripard <redacted>

Maxime

On Tue, 2021-09-07 at 22:40 -0500, Samuel Holland wrote:

Until the R329, the LRADC hardware was always active. Now it requires
enabling a clock gate and deasserting a reset line. Do this if the clock
and reset are provided in the device tree, but keep them optional to
maintain support for the existing binding.

Signed-off-by: Samuel Holland <samuel@sholland.org>

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

regards
Philipp

Hi Samuel,

On Tue, Sep 07, 2021 at 10:40:15PM -0500, Samuel Holland wrote:

This wouldn't report an error if the clocks are missing on the R329 (and
D1), even though they are required. The way we usually deal with this is
through a flag in the variant structure (at least to guard clk_get /
reset_control_get)

Maxime

On Tue, 07 Sep 2021 22:40:14 -0500, Samuel Holland wrote:

The R329 and D1 SoCs each contain an LRADC with a programming interface
compatible to earlier LRADCs. However, the LRADC now has its own clock
gate and reset line, instead of being always active.

To support this, add clock/reset properties to the binding, and require
them for the variant in the new SoCs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 .../input/allwinner,sun4i-a10-lradc-keys.yaml | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

Reviewed-by: Rob Herring <robh@kernel.org>