Re: [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR
From: Thomas Gleixner <hidden>
Date: 2020-10-06 21:54:31
Also in:
kvm, linux-iommu
On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote:
From: David Woodhouse <redacted> When interrupt remapping isn't enabled, only the first 255 CPUs can
No, only CPUs with an APICid < 255 ....
receive external interrupts. Set the appropriate max affinity for the IOAPIC and MSI IRQ domains accordingly. This also fixes the case where interrupt remapping is enabled but some devices are not within the scope of any active IOMMU.
What? If this fixes an pre-existing problem then
1) Explain the problem proper
2) Have a patch at the beginning of the series which fixes it
independently of this pile
If it's fixing a problem in your pile, then you got the ordering wrong.
You didn't start kernel programming as of yesterday, so you really know
how that works.
ip->irqdomain->parent = parent; + if (parent == x86_vector_domain) + irq_domain_set_affinity(ip->irqdomain, &x86_non_ir_cpumask);
OMG
quoted hunk ↗ jump to hunk
if (cfg->type == IOAPIC_DOMAIN_LEGACY || cfg->type == IOAPIC_DOMAIN_STRICT)diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c index 4d891967bea4..af5ce5c4da02 100644 --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c@@ -259,6 +259,7 @@ struct irq_domain * __init native_create_pci_msi_domain(void) pr_warn("Failed to initialize PCI-MSI irqdomain.\n"); } else { d->flags |= IRQ_DOMAIN_MSI_NOMASK_QUIRK; + irq_domain_set_affinity(d, &x86_non_ir_cpumask);
So here it's unconditional
quoted hunk ↗ jump to hunk
} return d; }@@ -479,6 +480,8 @@ struct irq_domain *hpet_create_irq_domain(int hpet_id) irq_domain_free_fwnode(fn); kfree(domain_info); } + if (parent == x86_vector_domain) + irq_domain_set_affinity(d, &x86_non_ir_cpumask);
And here we need a condition again. Completely obvious and reviewable - NOT.
Thanks,
tglx