[PATCH 5/5] OMAPDSS: DSI: Fix PLL_SELFEQDCO field width
From: Tomi Valkeinen <hidden>
Date: 2014-10-22 08:39:34
Also in:
linux-omap
Subsystem:
framebuffer layer, omap display subsystem and framebuffer support (dss2), the rest · Maintainers:
Helge Deller, Linus Torvalds
PLL_SELFREQDCO bitfield is from bit 3 to 1, but the driver writes bits from 4 to 1. The bit 4 is 'reserved', so this probably should not cause any issues, but it's better to fix it. Signed-off-by: Tomi Valkeinen <redacted> --- drivers/video/fbdev/omap2/dss/dsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/fbdev/omap2/dss/dsi.c b/drivers/video/fbdev/omap2/dss/dsi.c
index 947bd7b93375..0793bc67a275 100644
--- a/drivers/video/fbdev/omap2/dss/dsi.c
+++ b/drivers/video/fbdev/omap2/dss/dsi.c@@ -1603,7 +1603,7 @@ int dsi_pll_set_clock_div(struct platform_device *dsidev, } else if (dss_has_feature(FEAT_DSI_PLL_SELFREQDCO)) { f = cinfo->clkin4ddr < 1000000000 ? 0x2 : 0x4; - l = FLD_MOD(l, f, 4, 1); /* PLL_SELFREQDCO */ + l = FLD_MOD(l, f, 3, 1); /* PLL_SELFREQDCO */ } l = FLD_MOD(l, 1, 13, 13); /* DSI_PLL_REFEN */
--
2.1.1