[PATCH 0/6] OMAPDSS: suspend/resume improvements

@@ -1072,6 +1072,7 @@ static void dss_setup_fifos(void)
 static int dss_mgr_enable_compat(struct omap_overlay_manager *mgr)
 {
 	struct mgr_priv_data *mp = get_mgr_priv(mgr);
+	struct omap_overlay *ovl;
 	unsigned long flags;
 	int r;
 

@@ -1091,6 +1092,27 @@ static int dss_mgr_enable_compat(struct omap_overlay_manager *mgr)
 		goto err;
 	}
 
+	/*
+	 * Mark the info & extra_info dirty for the manager and its enabled
+	 * overlays to force register writes. This ensures that the relevant
+	 * registers are set after DSS has been off and the registers have been
+	 * reset.
+	 */
+
+	mp->info_dirty = true;
+	mp->extra_info_dirty = true;
+
+	list_for_each_entry(ovl, &mgr->overlays, list) {
+		struct ovl_priv_data *op = get_ovl_priv(ovl);
+
+		if (!op->enabled)
+			continue;
+
+		op->info_dirty = true;
+		op->extra_info_dirty = true;
+		dispc_ovl_set_channel_out(ovl->id, mgr->id);
+	}
+
 	dss_setup_fifos();
 
 	dss_write_regs();

@@ -43,9 +43,6 @@
 #include "dss_features.h"
 #include "dispc.h"
 
-/* DISPC */
-#define DISPC_SZ_REGS			SZ_4K
-
 enum omap_burst_size {
 	BURST_SIZE_X2 = 0,
 	BURST_SIZE_X4 = 1,

@@ -98,8 +95,6 @@ static struct {
 	struct platform_device *pdev;
 	void __iomem    *base;
 
-	int		ctx_loss_cnt;
-
 	int irq;
 
 	unsigned long core_clk_rate;

@@ -109,9 +104,6 @@ static struct {
 	/* maps which plane is using a fifo. fifo-id -> plane-id */
 	int fifo_assignment[DISPC_MAX_NR_FIFOS];
 
-	bool		ctx_valid;
-	u32		ctx[DISPC_SZ_REGS / sizeof(u32)];
-
 	const struct dispc_features *feat;
 } dispc;
 

@@ -248,249 +240,6 @@ static void mgr_fld_write(enum omap_channel channel,
 	REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low);
 }
 
-#define SR(reg) \
-	dispc.ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(DISPC_##reg)
-#define RR(reg) \
-	dispc_write_reg(DISPC_##reg, dispc.ctx[DISPC_##reg / sizeof(u32)])
-
-static void dispc_save_context(void)
-{
-	int i, j;
-
-	DSSDBG("dispc_save_context\n");
-
-	SR(IRQENABLE);
-	SR(CONTROL);
-	SR(CONFIG);
-	SR(LINE_NUMBER);
-	if (dss_has_feature(FEAT_ALPHA_FIXED_ZORDER) ||
-			dss_has_feature(FEAT_ALPHA_FREE_ZORDER))
-		SR(GLOBAL_ALPHA);
-	if (dss_has_feature(FEAT_MGR_LCD2)) {
-		SR(CONTROL2);
-		SR(CONFIG2);
-	}
-	if (dss_has_feature(FEAT_MGR_LCD3)) {
-		SR(CONTROL3);
-		SR(CONFIG3);
-	}
-
-	for (i = 0; i < dss_feat_get_num_mgrs(); i++) {
-		SR(DEFAULT_COLOR(i));
-		SR(TRANS_COLOR(i));
-		SR(SIZE_MGR(i));
-		if (i = OMAP_DSS_CHANNEL_DIGIT)
-			continue;
-		SR(TIMING_H(i));
-		SR(TIMING_V(i));
-		SR(POL_FREQ(i));
-		SR(DIVISORo(i));
-
-		SR(DATA_CYCLE1(i));
-		SR(DATA_CYCLE2(i));
-		SR(DATA_CYCLE3(i));
-
-		if (dss_has_feature(FEAT_CPR)) {
-			SR(CPR_COEF_R(i));
-			SR(CPR_COEF_G(i));
-			SR(CPR_COEF_B(i));
-		}
-	}
-
-	for (i = 0; i < dss_feat_get_num_ovls(); i++) {
-		SR(OVL_BA0(i));
-		SR(OVL_BA1(i));
-		SR(OVL_POSITION(i));
-		SR(OVL_SIZE(i));
-		SR(OVL_ATTRIBUTES(i));
-		SR(OVL_FIFO_THRESHOLD(i));
-		SR(OVL_ROW_INC(i));
-		SR(OVL_PIXEL_INC(i));
-		if (dss_has_feature(FEAT_PRELOAD))
-			SR(OVL_PRELOAD(i));
-		if (i = OMAP_DSS_GFX) {
-			SR(OVL_WINDOW_SKIP(i));
-			SR(OVL_TABLE_BA(i));
-			continue;
-		}
-		SR(OVL_FIR(i));
-		SR(OVL_PICTURE_SIZE(i));
-		SR(OVL_ACCU0(i));
-		SR(OVL_ACCU1(i));
-
-		for (j = 0; j < 8; j++)
-			SR(OVL_FIR_COEF_H(i, j));
-
-		for (j = 0; j < 8; j++)
-			SR(OVL_FIR_COEF_HV(i, j));
-
-		for (j = 0; j < 5; j++)
-			SR(OVL_CONV_COEF(i, j));
-
-		if (dss_has_feature(FEAT_FIR_COEF_V)) {
-			for (j = 0; j < 8; j++)
-				SR(OVL_FIR_COEF_V(i, j));
-		}
-
-		if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
-			SR(OVL_BA0_UV(i));
-			SR(OVL_BA1_UV(i));
-			SR(OVL_FIR2(i));
-			SR(OVL_ACCU2_0(i));
-			SR(OVL_ACCU2_1(i));
-
-			for (j = 0; j < 8; j++)
-				SR(OVL_FIR_COEF_H2(i, j));
-
-			for (j = 0; j < 8; j++)
-				SR(OVL_FIR_COEF_HV2(i, j));
-
-			for (j = 0; j < 8; j++)
-				SR(OVL_FIR_COEF_V2(i, j));
-		}
-		if (dss_has_feature(FEAT_ATTR2))
-			SR(OVL_ATTRIBUTES2(i));
-	}
-
-	if (dss_has_feature(FEAT_CORE_CLK_DIV))
-		SR(DIVISOR);
-
-	dispc.ctx_loss_cnt = dss_get_ctx_loss_count();
-	dispc.ctx_valid = true;
-
-	DSSDBG("context saved, ctx_loss_count %d\n", dispc.ctx_loss_cnt);
-}
-
-static void dispc_restore_context(void)
-{
-	int i, j, ctx;
-
-	DSSDBG("dispc_restore_context\n");
-
-	if (!dispc.ctx_valid)
-		return;
-
-	ctx = dss_get_ctx_loss_count();
-
-	if (ctx >= 0 && ctx = dispc.ctx_loss_cnt)
-		return;
-
-	DSSDBG("ctx_loss_count: saved %d, current %d\n",
-			dispc.ctx_loss_cnt, ctx);
-
-	/*RR(IRQENABLE);*/
-	/*RR(CONTROL);*/
-	RR(CONFIG);
-	RR(LINE_NUMBER);
-	if (dss_has_feature(FEAT_ALPHA_FIXED_ZORDER) ||
-			dss_has_feature(FEAT_ALPHA_FREE_ZORDER))
-		RR(GLOBAL_ALPHA);
-	if (dss_has_feature(FEAT_MGR_LCD2))
-		RR(CONFIG2);
-	if (dss_has_feature(FEAT_MGR_LCD3))
-		RR(CONFIG3);
-
-	for (i = 0; i < dss_feat_get_num_mgrs(); i++) {
-		RR(DEFAULT_COLOR(i));
-		RR(TRANS_COLOR(i));
-		RR(SIZE_MGR(i));
-		if (i = OMAP_DSS_CHANNEL_DIGIT)
-			continue;
-		RR(TIMING_H(i));
-		RR(TIMING_V(i));
-		RR(POL_FREQ(i));
-		RR(DIVISORo(i));
-
-		RR(DATA_CYCLE1(i));
-		RR(DATA_CYCLE2(i));
-		RR(DATA_CYCLE3(i));
-
-		if (dss_has_feature(FEAT_CPR)) {
-			RR(CPR_COEF_R(i));
-			RR(CPR_COEF_G(i));
-			RR(CPR_COEF_B(i));
-		}
-	}
-
-	for (i = 0; i < dss_feat_get_num_ovls(); i++) {
-		RR(OVL_BA0(i));
-		RR(OVL_BA1(i));
-		RR(OVL_POSITION(i));
-		RR(OVL_SIZE(i));
-		RR(OVL_ATTRIBUTES(i));
-		RR(OVL_FIFO_THRESHOLD(i));
-		RR(OVL_ROW_INC(i));
-		RR(OVL_PIXEL_INC(i));
-		if (dss_has_feature(FEAT_PRELOAD))
-			RR(OVL_PRELOAD(i));
-		if (i = OMAP_DSS_GFX) {
-			RR(OVL_WINDOW_SKIP(i));
-			RR(OVL_TABLE_BA(i));
-			continue;
-		}
-		RR(OVL_FIR(i));
-		RR(OVL_PICTURE_SIZE(i));
-		RR(OVL_ACCU0(i));
-		RR(OVL_ACCU1(i));
-
-		for (j = 0; j < 8; j++)
-			RR(OVL_FIR_COEF_H(i, j));
-
-		for (j = 0; j < 8; j++)
-			RR(OVL_FIR_COEF_HV(i, j));
-
-		for (j = 0; j < 5; j++)
-			RR(OVL_CONV_COEF(i, j));
-
-		if (dss_has_feature(FEAT_FIR_COEF_V)) {
-			for (j = 0; j < 8; j++)
-				RR(OVL_FIR_COEF_V(i, j));
-		}
-
-		if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
-			RR(OVL_BA0_UV(i));
-			RR(OVL_BA1_UV(i));
-			RR(OVL_FIR2(i));
-			RR(OVL_ACCU2_0(i));
-			RR(OVL_ACCU2_1(i));
-
-			for (j = 0; j < 8; j++)
-				RR(OVL_FIR_COEF_H2(i, j));
-
-			for (j = 0; j < 8; j++)
-				RR(OVL_FIR_COEF_HV2(i, j));
-
-			for (j = 0; j < 8; j++)
-				RR(OVL_FIR_COEF_V2(i, j));
-		}
-		if (dss_has_feature(FEAT_ATTR2))
-			RR(OVL_ATTRIBUTES2(i));
-	}
-
-	if (dss_has_feature(FEAT_CORE_CLK_DIV))
-		RR(DIVISOR);
-
-	/* enable last, because LCD & DIGIT enable are here */
-	RR(CONTROL);
-	if (dss_has_feature(FEAT_MGR_LCD2))
-		RR(CONTROL2);
-	if (dss_has_feature(FEAT_MGR_LCD3))
-		RR(CONTROL3);
-	/* clear spurious SYNC_LOST_DIGIT interrupts */
-	dispc_clear_irqstatus(DISPC_IRQ_SYNC_LOST_DIGIT);
-
-	/*
-	 * enable last so IRQs won't trigger before
-	 * the context is fully restored
-	 */
-	RR(IRQENABLE);
-
-	DSSDBG("context restored\n");
-}
-
-#undef SR
-#undef RR
-
 int dispc_runtime_get(void)
 {
 	int r;

@@ -3726,14 +3475,12 @@ static int __exit omap_dispchw_remove(struct platform_device *pdev)
 
 static int dispc_runtime_suspend(struct device *dev)
 {
-	dispc_save_context();
-
 	return 0;
 }
 
 static int dispc_runtime_resume(struct device *dev)
 {
-	dispc_restore_context();
+	_omap_dispc_initial_config();
 
 	return 0;
 }

@@ -39,8 +39,6 @@
 #include "dss.h"
 #include "dss_features.h"
 
-#define DSS_SZ_REGS			SZ_512
-
 struct dss_reg {
 	u16 idx;
 };

@@ -71,6 +69,13 @@ struct dss_features {
 	int (*dpi_select_source)(enum omap_channel channel);
 };
 
+struct dss_context {
+	bool valid;
+	u32 control;
+	u32 sdi_control;
+	u32 pll_control;
+};
+
 static struct {
 	struct platform_device *pdev;
 	void __iomem    *base;

@@ -88,8 +93,7 @@ static struct {
 	enum omap_dss_clk_source dispc_clk_source;
 	enum omap_dss_clk_source lcd_clk_source[MAX_DSS_LCD_MANAGERS];
 
-	bool		ctx_valid;
-	u32		ctx[DSS_SZ_REGS / sizeof(u32)];
+	struct dss_context ctx;
 
 	const struct dss_features *feat;
 } dss;

@@ -112,49 +116,6 @@ static inline u32 dss_read_reg(const struct dss_reg idx)
 	return __raw_readl(dss.base + idx.idx);
 }
 
-#define SR(reg) \
-	dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)
-#define RR(reg) \
-	dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])
-
-static void dss_save_context(void)
-{
-	DSSDBG("dss_save_context\n");
-
-	SR(CONTROL);
-
-	if (dss_feat_get_supported_displays(OMAP_DSS_CHANNEL_LCD) &
-			OMAP_DISPLAY_TYPE_SDI) {
-		SR(SDI_CONTROL);
-		SR(PLL_CONTROL);
-	}
-
-	dss.ctx_valid = true;
-
-	DSSDBG("context saved\n");
-}
-
-static void dss_restore_context(void)
-{
-	DSSDBG("dss_restore_context\n");
-
-	if (!dss.ctx_valid)
-		return;
-
-	RR(CONTROL);
-
-	if (dss_feat_get_supported_displays(OMAP_DSS_CHANNEL_LCD) &
-			OMAP_DISPLAY_TYPE_SDI) {
-		RR(SDI_CONTROL);
-		RR(PLL_CONTROL);
-	}
-
-	DSSDBG("context restored\n");
-}
-
-#undef SR
-#undef RR
-
 int dss_get_ctx_loss_count(void)
 {
 	struct platform_device *core_pdev = dss_get_core_pdev();

@@ -927,7 +888,16 @@ static int __exit omap_dsshw_remove(struct platform_device *pdev)
 
 static int dss_runtime_suspend(struct device *dev)
 {
-	dss_save_context();
+	dss.ctx.control = dss_read_reg(DSS_CONTROL);
+
+	if (dss_feat_get_supported_displays(OMAP_DSS_CHANNEL_LCD) &
+			OMAP_DISPLAY_TYPE_SDI) {
+		dss.ctx.sdi_control = dss_read_reg(DSS_SDI_CONTROL);
+		dss.ctx.pll_control = dss_read_reg(DSS_PLL_CONTROL);
+	}
+
+	dss.ctx.valid = true;
+
 	dss_set_min_bus_tput(dev, 0);
 	return 0;
 }

@@ -946,7 +916,16 @@ static int dss_runtime_resume(struct device *dev)
 	if (r)
 		return r;
 
-	dss_restore_context();
+	if (dss.ctx.valid) {
+		dss_write_reg(DSS_CONTROL, dss.ctx.control);
+
+		if (dss_feat_get_supported_displays(OMAP_DSS_CHANNEL_LCD) &
+				OMAP_DISPLAY_TYPE_SDI) {
+			dss_write_reg(DSS_SDI_CONTROL, dss.ctx.sdi_control);
+			dss_write_reg(DSS_PLL_CONTROL, dss.ctx.pll_control);
+		}
+	}
+
 	return 0;
 }
 

@@ -341,7 +341,6 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
 	board_data->version = ver;
 	board_data->dsi_enable_pads = omap_dsi_enable_pads;
 	board_data->dsi_disable_pads = omap_dsi_disable_pads;
-	board_data->get_context_loss_count = omap_pm_get_dev_context_loss_count;
 	board_data->set_min_bus_tput = omap_dss_set_min_bus_tput;
 
 	omap_display_device.dev.platform_data = board_data;

@@ -116,22 +116,6 @@ static inline u32 dss_read_reg(const struct dss_reg idx)
 	return __raw_readl(dss.base + idx.idx);
 }
 
-int dss_get_ctx_loss_count(void)
-{
-	struct platform_device *core_pdev = dss_get_core_pdev();
-	struct omap_dss_board_info *board_data = core_pdev->dev.platform_data;
-	int cnt;
-
-	if (!board_data->get_context_loss_count)
-		return -ENOENT;
-
-	cnt = board_data->get_context_loss_count(&dss.pdev->dev);
-
-	WARN_ONCE(cnt < 0, "get_context_loss_count failed: %d\n", cnt);
-
-	return cnt;
-}
-
 void dss_sdi_init(int datapairs)
 {
 	u32 l;

@@ -233,8 +233,6 @@ void dss_dump_clocks(struct seq_file *s);
 void dss_debug_dump_clocks(struct seq_file *s);
 #endif
 
-int dss_get_ctx_loss_count(void);
-
 void dss_sdi_init(int datapairs);
 int dss_sdi_enable(void);
 void dss_sdi_disable(void);

@@ -323,7 +323,6 @@ enum omapdss_version {
 
 /* Board specific data */
 struct omap_dss_board_info {
-	int (*get_context_loss_count)(struct device *dev);
 	int num_devices;
 	struct omap_dss_device **devices;
 	struct omap_dss_device *default_device;

@@ -3475,11 +3475,15 @@ static int __exit omap_dispchw_remove(struct platform_device *pdev)
 
 static int dispc_runtime_suspend(struct device *dev)
 {
+	DSSDBG("suspend\n");
+
 	return 0;
 }
 
 static int dispc_runtime_resume(struct device *dev)
 {
+	DSSDBG("resume\n");
+
 	_omap_dispc_initial_config();
 
 	return 0;

@@ -5477,6 +5477,8 @@ static int __exit omap_dsihw_remove(struct platform_device *dsidev)
 
 static int dsi_runtime_suspend(struct device *dev)
 {
+	DSSDBG("suspend\n");
+
 	dispc_runtime_put();
 
 	return 0;

@@ -5486,6 +5488,8 @@ static int dsi_runtime_resume(struct device *dev)
 {
 	int r;
 
+	DSSDBG("resume\n");
+
 	r = dispc_runtime_get();
 	if (r)
 		return r;

@@ -872,6 +872,8 @@ static int __exit omap_dsshw_remove(struct platform_device *pdev)
 
 static int dss_runtime_suspend(struct device *dev)
 {
+	DSSDBG("suspend\n");
+
 	dss.ctx.control = dss_read_reg(DSS_CONTROL);
 
 	if (dss_feat_get_supported_displays(OMAP_DSS_CHANNEL_LCD) &

@@ -889,6 +891,9 @@ static int dss_runtime_suspend(struct device *dev)
 static int dss_runtime_resume(struct device *dev)
 {
 	int r;
+
+	DSSDBG("resume\n");
+
 	/*
 	 * Set an arbitrarily high tput request to ensure OPP100.
 	 * What we should really do is to make a request to stay in OPP100,

@@ -650,6 +650,8 @@ static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
 
 static int hdmi_runtime_suspend(struct device *dev)
 {
+	DSSDBG("suspend\n");
+
 	clk_disable_unprepare(hdmi.sys_clk);
 
 	dispc_runtime_put();

@@ -661,6 +663,8 @@ static int hdmi_runtime_resume(struct device *dev)
 {
 	int r;
 
+	DSSDBG("resume\n");
+
 	r = dispc_runtime_get();
 	if (r < 0)
 		return r;

@@ -1016,6 +1016,8 @@ static int __exit omap_rfbihw_remove(struct platform_device *pdev)
 
 static int rfbi_runtime_suspend(struct device *dev)
 {
+	DSSDBG("suspend\n");
+
 	dispc_runtime_put();
 
 	return 0;

@@ -1025,6 +1027,8 @@ static int rfbi_runtime_resume(struct device *dev)
 {
 	int r;
 
+	DSSDBG("resume\n");
+
 	r = dispc_runtime_get();
 	if (r < 0)
 		return r;

@@ -867,6 +867,8 @@ static int __exit omap_venchw_remove(struct platform_device *pdev)
 
 static int venc_runtime_suspend(struct device *dev)
 {
+	DSSDBG("suspend\n");
+
 	if (venc.tv_dac_clk)
 		clk_disable_unprepare(venc.tv_dac_clk);
 

@@ -879,6 +881,8 @@ static int venc_runtime_resume(struct device *dev)
 {
 	int r;
 
+	DSSDBG("resume\n");
+
 	r = dispc_runtime_get();
 	if (r < 0)
 		return r;

@@ -258,7 +258,8 @@ void dispc_runtime_put(void)
 
 	DSSDBG("dispc_runtime_put\n");
 
-	r = pm_runtime_put_sync(&dispc.pdev->dev);
+	pm_runtime_mark_last_busy(&dispc.pdev->dev);
+	r = pm_runtime_put_autosuspend(&dispc.pdev->dev);
 	WARN_ON(r < 0 && r != -ENOSYS);
 }
 EXPORT_SYMBOL(dispc_runtime_put);

@@ -3440,6 +3441,8 @@ static int __init omap_dispchw_probe(struct platform_device *pdev)
 	}
 
 	pm_runtime_enable(&pdev->dev);
+	pm_runtime_set_autosuspend_delay(&pdev->dev, DSS_AUTOSUSPEND_DELAY);
+	pm_runtime_use_autosuspend(&pdev->dev);
 
 	r = dispc_runtime_get();
 	if (r)

@@ -1110,7 +1110,8 @@ void dsi_runtime_put(struct platform_device *dsidev)
 
 	DSSDBG("dsi_runtime_put\n");
 
-	r = pm_runtime_put_sync(&dsi->pdev->dev);
+	pm_runtime_mark_last_busy(&dsi->pdev->dev);
+	r = pm_runtime_put_autosuspend(&dsi->pdev->dev);
 	WARN_ON(r < 0 && r != -ENOSYS);
 }
 

@@ -5416,6 +5417,8 @@ static int omap_dsihw_probe(struct platform_device *dsidev)
 		return r;
 
 	pm_runtime_enable(&dsidev->dev);
+	pm_runtime_set_autosuspend_delay(&dsidev->dev, DSS_AUTOSUSPEND_DELAY);
+	pm_runtime_use_autosuspend(&dsidev->dev);
 
 	r = dsi_runtime_get(dsidev);
 	if (r)

@@ -689,7 +689,8 @@ static void dss_runtime_put(void)
 
 	DSSDBG("dss_runtime_put\n");
 
-	r = pm_runtime_put_sync(&dss.pdev->dev);
+	pm_runtime_mark_last_busy(&dss.pdev->dev);
+	r = pm_runtime_put_autosuspend(&dss.pdev->dev);
 	WARN_ON(r < 0 && r != -ENOSYS && r != -EBUSY);
 }
 

@@ -821,6 +822,8 @@ static int __init omap_dsshw_probe(struct platform_device *pdev)
 		goto err_setup_clocks;
 
 	pm_runtime_enable(&pdev->dev);
+	pm_runtime_set_autosuspend_delay(&pdev->dev, DSS_AUTOSUSPEND_DELAY);
+	pm_runtime_use_autosuspend(&pdev->dev);
 
 	r = dss_runtime_get();
 	if (r)

@@ -73,6 +73,8 @@
 #define FLD_MOD(orig, val, start, end) \
 	(((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
 
+#define DSS_AUTOSUSPEND_DELAY 100	/* in ms */
+
 enum dss_io_pad_mode {
 	DSS_IO_PAD_MODE_RESET,
 	DSS_IO_PAD_MODE_RFBI,

@@ -77,7 +77,8 @@ static void hdmi_runtime_put(void)
 
 	DSSDBG("hdmi_runtime_put\n");
 
-	r = pm_runtime_put_sync(&hdmi.pdev->dev);
+	pm_runtime_mark_last_busy(&hdmi.pdev->dev);
+	r = pm_runtime_put_autosuspend(&hdmi.pdev->dev);
 	WARN_ON(r < 0 && r != -ENOSYS);
 }
 

@@ -631,6 +632,8 @@ static int omapdss_hdmihw_probe(struct platform_device *pdev)
 	}
 
 	pm_runtime_enable(&pdev->dev);
+	pm_runtime_set_autosuspend_delay(&pdev->dev, DSS_AUTOSUSPEND_DELAY);
+	pm_runtime_use_autosuspend(&pdev->dev);
 
 	hdmi_init_output(pdev);
 

@@ -147,7 +147,8 @@ static void rfbi_runtime_put(void)
 
 	DSSDBG("rfbi_runtime_put\n");
 
-	r = pm_runtime_put_sync(&rfbi.pdev->dev);
+	pm_runtime_mark_last_busy(&rfbi.pdev->dev);
+	r = pm_runtime_put_autosuspend(&rfbi.pdev->dev);
 	WARN_ON(r < 0 && r != -ENOSYS);
 }
 

@@ -981,6 +982,8 @@ static int omap_rfbihw_probe(struct platform_device *pdev)
 	clk_put(clk);
 
 	pm_runtime_enable(&pdev->dev);
+	pm_runtime_set_autosuspend_delay(&pdev->dev, DSS_AUTOSUSPEND_DELAY);
+	pm_runtime_use_autosuspend(&pdev->dev);
 
 	r = rfbi_runtime_get();
 	if (r)

@@ -410,7 +410,8 @@ static void venc_runtime_put(void)
 
 	DSSDBG("venc_runtime_put\n");
 
-	r = pm_runtime_put_sync(&venc.pdev->dev);
+	pm_runtime_mark_last_busy(&venc.pdev->dev);
+	r = pm_runtime_put_autosuspend(&venc.pdev->dev);
 	WARN_ON(r < 0 && r != -ENOSYS);
 }
 

@@ -835,6 +836,8 @@ static int omap_venchw_probe(struct platform_device *pdev)
 		return r;
 
 	pm_runtime_enable(&pdev->dev);
+	pm_runtime_set_autosuspend_delay(&pdev->dev, DSS_AUTOSUSPEND_DELAY);
+	pm_runtime_use_autosuspend(&pdev->dev);
 
 	r = venc_runtime_get();
 	if (r)