[RFC 00/11] OMAPDSS: Add writeback mem to mem mode support

@@ -99,6 +99,19 @@ config OMAP2_DSS_DSI
 
 	  See http://www.mipi.org/ for DSI specifications.
 
+config OMAP4_DSS_WRITEBACK
+	bool "writeback support"
+	default n
+	help
+	  writeback is a DISPC pipeline that takes pixel data from an overlay
+	  output or a overlay manager output and writes it back into a specified
+	  address in memory.
+
+	  writeback pipeline allows us to take benefit of the hardware
+	  processing available inside the DISPC like color space conversion,
+	  rescaling, compositing etc and perform either a memory-to-memory
+	  transfer with data processing, or capture a displayed frame.
+
 config OMAP2_DSS_MIN_FCK_PER_PCK
 	int "Minimum FCK/PCK ratio (for scaling)"
 	range 0 32

@@ -8,4 +8,5 @@ omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o
 omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o
 omapdss-$(CONFIG_OMAP4_DSS_HDMI) += hdmi.o \
 				    hdmi_panel.o ti_hdmi_4xxx_ip.o
+omapdss-$(CONFIG_OMAP4_DSS_WRITEBACK) += writeback.o
 ccflags-$(CONFIG_OMAP2_DSS_DEBUG) += -DDEBUG

@@ -528,6 +528,9 @@ static int (*dss_output_drv_reg_funcs[])(void) __initdata = {
 #ifdef CONFIG_OMAP4_DSS_HDMI
 	hdmi_init_platform_driver,
 #endif
+#ifdef CONFIG_OMAP4_DSS_WRITEBACK
+	writeback_init_platform_driver,
+#endif
 };
 
 static void (*dss_output_drv_unreg_funcs[])(void) __exitdata = {

@@ -549,6 +552,9 @@ static void (*dss_output_drv_unreg_funcs[])(void) __exitdata = {
 #ifdef CONFIG_OMAP4_DSS_HDMI
 	hdmi_uninit_platform_driver,
 #endif
+#ifdef CONFIG_OMAP4_DSS_WRITEBACK
+	writeback_uninit_platform_driver,
+#endif
 };
 
 static bool dss_output_drv_loaded[ARRAY_SIZE(dss_output_drv_reg_funcs)];

@@ -528,6 +528,12 @@ bool hdmi_mode_has_audio(void);
 int hdmi_audio_config(struct omap_dss_audio *audio);
 #endif
 
+/* Writeback */
+#ifdef CONFIG_OMAP4_DSS_WRITEBACK
+int writeback_init_platform_driver(void) __init;
+void writeback_uninit_platform_driver(void) __exit;
+#endif
+
 /* RFBI */
 int rfbi_init_platform_driver(void) __init;
 void rfbi_uninit_platform_driver(void) __exit;

@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2012 Texas Instruments
+ * Author: Archit Taneja <archit@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define DSS_SUBSYS_NAME "WB"
+
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+
+#include <video/omapdss.h>
+
+#include "dss.h"
+
+struct writeback_data {
+	struct mutex lock;
+
+	struct omap_dss_output output;
+};
+
+static inline struct writeback_data *writeback_get_drv_data(struct platform_device *wbdev)
+{
+	return dev_get_drvdata(&wbdev->dev);
+}
+
+static inline struct platform_device *writeback_get_wbdev_from_output(struct omap_dss_output *out)
+{
+	return out->pdev;
+}
+
+struct omap_dss_output *omap_dss_get_writeback(void)
+{
+	return omap_dss_get_output(OMAP_DSS_OUTPUT_WB);
+}
+EXPORT_SYMBOL(omap_dss_get_writeback);
+
+static void __init writeback_init_output(struct platform_device *pdev,
+		struct writeback_data *wb_data)
+{
+	struct omap_dss_output *out = &wb_data->output;
+
+	dss_register_output(out);
+
+	out->pdev = pdev;
+	out->id = OMAP_DSS_OUTPUT_WB;
+	out->type = OMAP_DISPLAY_TYPE_NONE;
+}
+
+static int __init omap_writeback_probe(struct platform_device *pdev)
+{
+	struct writeback_data *wb_data;
+
+	wb_data = devm_kzalloc(&pdev->dev, sizeof(*wb_data), GFP_KERNEL);
+	if (!wb_data)
+		return -ENOMEM;
+
+	dev_set_drvdata(&pdev->dev, wb_data);
+
+	mutex_init(&wb_data->lock);
+
+	writeback_init_output(pdev, wb_data);
+
+	return 0;
+}
+
+static int __exit omap_writeback_remove(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static struct platform_driver omap_writeback_driver = {
+	.remove         = __exit_p(omap_writeback_remove),
+	.driver         = {
+		.name   = "omapdss_writeback",
+		.owner  = THIS_MODULE,
+	},
+};
+
+int __init writeback_init_platform_driver(void)
+{
+	return platform_driver_probe(&omap_writeback_driver,
+			omap_writeback_probe);
+}
+
+void __exit writeback_uninit_platform_driver(void)
+{
+	platform_driver_unregister(&omap_writeback_driver);
+}

@@ -217,6 +217,7 @@ enum omap_dss_output_id {
 	OMAP_DSS_OUTPUT_DSI2	= 1 << 4,
 	OMAP_DSS_OUTPUT_VENC	= 1 << 5,
 	OMAP_DSS_OUTPUT_HDMI	= 1 << 6,
+	OMAP_DSS_OUTPUT_WB	= 1 << 7,
 };
 
 /* RFBI */

@@ -836,4 +837,13 @@ void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
 void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
 		struct rfbi_timings *timings);
 
+#ifdef CONFIG_OMAP4_DSS_WRITEBACK
+struct omap_dss_output *omap_dss_get_writeback(void);
+#else
+static inline struct omap_dss_output *omap_dss_get_writeback(void)
+{
+	return NULL;
+}
+#endif
+
 #endif

@@ -106,9 +106,16 @@ struct mgr_priv_data {
 	struct dss_lcd_mgr_config lcd_config;
 };
 
+struct wb_priv_data {
+
+	bool user_info_dirty;
+	struct omap_dss_writeback_info user_info;
+};
+
 static struct {
 	struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
 	struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
+	struct wb_priv_data wb_priv_data;
 
 	bool irq_enabled;
 } dss_data;

@@ -131,6 +138,11 @@ static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
 	return &dss_data.mgr_priv_data_array[mgr->id];
 }
 
+static struct wb_priv_data *get_wb_priv(struct omap_dss_output *wb)
+{
+	return &dss_data.wb_priv_data;
+}
+
 void dss_apply_init(void)
 {
 	const int num_ovls = dss_feat_get_num_ovls();

@@ -1465,3 +1477,33 @@ err:
 	return r;
 }
 
+int dss_wb_set_info(struct omap_dss_output *wb,
+		struct omap_dss_writeback_info *info)
+{
+	struct wb_priv_data *wp = get_wb_priv(wb);
+	unsigned long flags;
+
+	/* TODO: Check validity of info */
+
+	spin_lock_irqsave(&data_lock, flags);
+
+	wp->user_info = *info;
+	wp->user_info_dirty = true;
+
+	spin_unlock_irqrestore(&data_lock, flags);
+
+	return 0;
+}
+
+void dss_wb_get_info(struct omap_dss_output *wb,
+		struct omap_dss_writeback_info *info)
+{
+	struct wb_priv_data *wp = get_wb_priv(wb);
+	unsigned long flags;
+
+	spin_lock_irqsave(&data_lock, flags);
+
+	*info = wp->user_info;
+
+	spin_unlock_irqrestore(&data_lock, flags);
+}

@@ -210,6 +210,11 @@ int dss_ovl_set_manager(struct omap_overlay *ovl,
 		struct omap_overlay_manager *mgr);
 int dss_ovl_unset_manager(struct omap_overlay *ovl);
 
+int dss_wb_set_info(struct omap_dss_output *wb,
+		struct omap_dss_writeback_info *info);
+void dss_wb_get_info(struct omap_dss_output *wb,
+		struct omap_dss_writeback_info *info);
+
 /* output */
 void dss_register_output(struct omap_dss_output *out);
 void dss_unregister_output(struct omap_dss_output *out);

@@ -42,6 +42,20 @@ static inline struct platform_device *writeback_get_wbdev_from_output(struct oma
 	return out->pdev;
 }
 
+int omapdss_writeback_set_info(struct omap_dss_output *wb,
+		struct omap_dss_writeback_info *info)
+{
+	return dss_wb_set_info(wb, info);
+}
+EXPORT_SYMBOL(omapdss_writeback_set_info);
+
+void omapdss_writeback_get_info(struct omap_dss_output *wb,
+		struct omap_dss_writeback_info *info)
+{
+	dss_wb_get_info(wb, info);
+}
+EXPORT_SYMBOL(omapdss_writeback_get_info);
+
 struct omap_dss_output *omap_dss_get_writeback(void)
 {
 	return omap_dss_get_output(OMAP_DSS_OUTPUT_WB);

@@ -837,6 +837,10 @@ void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
 void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
 		struct rfbi_timings *timings);
 
+int omapdss_writeback_set_info(struct omap_dss_output *wb,
+		struct omap_dss_writeback_info *info);
+void omapdss_writeback_get_info(struct omap_dss_output *wb,
+		struct omap_dss_writeback_info *info);
 #ifdef CONFIG_OMAP4_DSS_WRITEBACK
 struct omap_dss_output *omap_dss_get_writeback(void);
 #else

@@ -110,6 +110,15 @@ struct wb_priv_data {
 
 	bool user_info_dirty;
 	struct omap_dss_writeback_info user_info;
+
+	bool info_dirty;
+	struct omap_dss_writeback_info info;
+
+	/*
+	 * If true in memory to memory mode, a manager is connected to it.
+	 * However, it may not be active.
+	 */
+	bool enabled;
 };
 
 static struct {

@@ -209,6 +218,11 @@ static bool mgr_manual_update(struct omap_overlay_manager *mgr)
 	return mp->lcd_config.stallmode;
 }
 
+static bool wb_manual_update(struct omap_dss_output *wb)
+{
+	return true;
+}
+
 static int dss_check_settings_low(struct omap_overlay_manager *mgr,
 		bool applying)
 {

@@ -684,6 +698,36 @@ static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
 		mp->shadow_extra_info_dirty = true;
 }
 
+static void dss_wb_write_regs(struct omap_dss_output *wb)
+{
+	struct wb_priv_data *wp = get_wb_priv(wb);
+	struct omap_dss_writeback_info *wi;
+	struct mgr_priv_data *mp;
+	u32 fifo_low, fifo_high;
+	bool use_fifo_merge = false;
+	int r;
+
+	if (!wp->enabled || !wp->info_dirty)
+		return;
+
+	wi = &wp->info;
+
+	mp = get_mgr_priv(wb->manager);
+
+	dispc_ovl_compute_fifo_thresholds(OMAP_DSS_WB, &fifo_low, &fifo_high,
+			use_fifo_merge, wb_manual_update(wb));
+
+	dispc_ovl_set_fifo_threshold(OMAP_DSS_WB, fifo_low, fifo_high);
+
+	r = dispc_wb_setup(wi, wb_manual_update(wb), &mp->timings);
+	if (r) {
+		DSSERR("dispc_wb_setup failed %d\n", r);
+		return;
+	}
+
+	wp->info_dirty = false;
+}
+
 static void dss_write_regs(void)
 {
 	const int num_mgrs = omap_dss_get_num_overlay_managers();

@@ -1507,3 +1551,27 @@ void dss_wb_get_info(struct omap_dss_output *wb,
 
 	spin_unlock_irqrestore(&data_lock, flags);
 }
+
+int omap_dss_wb_apply(struct omap_dss_output *wb)
+{
+	struct wb_priv_data *wp = get_wb_priv(wb);
+	unsigned long flags;
+
+	DSSDBG("omap_dss_wb_apply\n");
+
+	spin_lock_irqsave(&data_lock, flags);
+
+	/* check for settings here */
+
+	if (!wp->user_info_dirty)
+		goto end;
+
+	wp->user_info_dirty = false;
+	wp->info_dirty = true;
+	wp->info = wp->user_info;
+
+end:
+	spin_unlock_irqrestore(&data_lock, flags);
+
+	return 0;
+}

@@ -214,6 +214,7 @@ int dss_wb_set_info(struct omap_dss_output *wb,
 		struct omap_dss_writeback_info *info);
 void dss_wb_get_info(struct omap_dss_output *wb,
 		struct omap_dss_writeback_info *info);
+int omap_dss_wb_apply(struct omap_dss_output *wb);
 
 /* output */
 void dss_register_output(struct omap_dss_output *out);

@@ -42,6 +42,12 @@ static inline struct platform_device *writeback_get_wbdev_from_output(struct oma
 	return out->pdev;
 }
 
+int omapdss_writeback_apply(struct omap_dss_output *wb)
+{
+	return omap_dss_wb_apply(wb);
+}
+EXPORT_SYMBOL(omapdss_writeback_apply);
+
 int omapdss_writeback_set_info(struct omap_dss_output *wb,
 		struct omap_dss_writeback_info *info)
 {

@@ -837,6 +837,7 @@ void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
 void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
 		struct rfbi_timings *timings);
 
+int omapdss_writeback_apply(struct omap_dss_output *wb);
 int omapdss_writeback_set_info(struct omap_dss_output *wb,
 		struct omap_dss_writeback_info *info);
 void omapdss_writeback_get_info(struct omap_dss_output *wb,

@@ -223,6 +223,11 @@ static bool wb_manual_update(struct omap_dss_output *wb)
 	return true;
 }
 
+static bool output_is_wb(struct omap_dss_output *out)
+{
+	return out ? out->id = OMAP_DSS_OUTPUT_WB : false;
+}
+
 static int dss_check_settings_low(struct omap_overlay_manager *mgr,
 		bool applying)
 {

@@ -1226,6 +1231,19 @@ static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
 
 	mp->timings = *timings;
 	mp->extra_info_dirty = true;
+
+	/*
+	 * If the connected output is writeback, and if the width or height of
+	 * the overlay manager change, writeback's input size needs to be
+	 * changed too. Dirty the writeback info so that it's reconfigured
+	 * along with the manager timings change.
+	 */
+	if (output_is_wb(mgr->output)) {
+		struct omap_dss_output *wb = mgr->output;
+		struct wb_priv_data *wp = get_wb_priv(wb);
+
+		wp->info_dirty = true;
+	}
 }
 
 void dss_mgr_set_timings(struct omap_overlay_manager *mgr,

@@ -30,6 +30,12 @@ struct writeback_data {
 	struct mutex lock;
 
 	struct omap_dss_output output;
+	/*
+	 * timings of manager to which writeback is connected, only configured
+	 * by writeback driver in mem to mem mode. In capture mode, manager
+	 * timings will be configured by the display interface.
+	 */
+	struct omap_video_timings input_timings;
 };
 
 static inline struct writeback_data *writeback_get_drv_data(struct platform_device *wbdev)

@@ -42,6 +48,23 @@ static inline struct platform_device *writeback_get_wbdev_from_output(struct oma
 	return out->pdev;
 }
 
+void omapdss_writeback_set_input_size(struct omap_dss_output *wb, u16 w, u16 h)
+{
+	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+
+	mutex_lock(&wb_data->lock);
+
+	wb_data->input_timings.x_res = w;
+	wb_data->input_timings.y_res = h;
+
+	if (wb->manager)
+		dss_mgr_set_timings(wb->manager, &wb_data->input_timings);
+
+	mutex_unlock(&wb_data->lock);
+}
+EXPORT_SYMBOL(omapdss_writeback_set_input_size);
+
 int omapdss_writeback_apply(struct omap_dss_output *wb)
 {
 	return omap_dss_wb_apply(wb);

@@ -92,6 +115,14 @@ static int __init omap_writeback_probe(struct platform_device *pdev)
 
 	mutex_init(&wb_data->lock);
 
+	/* initialize with dummy timings */
+	wb_data->input_timings = (struct omap_video_timings)
+		{ 640, 480, 0, 1, 1, 1, 1, 0, 0, false,
+			OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
+			OMAPDSS_DRIVE_SIG_RISING_EDGE, OMAPDSS_SIG_ACTIVE_HIGH,
+			OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
+		};
+
 	writeback_init_output(pdev, wb_data);
 
 	return 0;

@@ -837,6 +837,7 @@ void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
 void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
 		struct rfbi_timings *timings);
 
+void omapdss_writeback_set_input_size(struct omap_dss_output *wb, u16 w, u16 h);
 int omapdss_writeback_apply(struct omap_dss_output *wb);
 int omapdss_writeback_set_info(struct omap_dss_output *wb,
 		struct omap_dss_writeback_info *info);

@@ -1593,3 +1593,73 @@ end:
 
 	return 0;
 }
+
+int dss_wb_enable(struct omap_dss_output *wb)
+{
+	struct wb_priv_data *wp = get_wb_priv(wb);
+	struct mgr_priv_data *mp;
+	unsigned long flags;
+	int r;
+
+	mutex_lock(&apply_lock);
+
+	if (wp->enabled) {
+		r = 0;
+		goto out;
+	}
+
+	if (wb->manager = NULL) {
+		DSSERR("can't enable writeback without a manager\n");
+		r = -EINVAL;
+		goto out;
+	}
+
+	mp = get_mgr_priv(wb->manager);
+
+	spin_lock_irqsave(&data_lock, flags);
+
+	if (!mp->enabled) {
+		DSSERR("can't enable writeback with a disabled manager\n");
+		r = -EINVAL;
+		goto err;
+	}
+
+	wp->enabled = true;
+
+	/*
+	 * TODO: check settings here, if we fail, set wp->enabled back to
+	 * false
+	 */
+
+	spin_unlock_irqrestore(&data_lock, flags);
+
+	mutex_unlock(&apply_lock);
+
+	return 0;
+err:
+	spin_unlock_irqrestore(&data_lock, flags);
+out:
+	mutex_unlock(&apply_lock);
+
+	return r;
+}
+
+void dss_wb_disable(struct omap_dss_output *wb)
+{
+	struct wb_priv_data *wp = get_wb_priv(wb);
+	unsigned long flags;
+
+	mutex_lock(&apply_lock);
+
+	if (!wp->enabled)
+		goto out;
+
+	spin_lock_irqsave(&data_lock, flags);
+
+	wp->updating = false;
+	wp->enabled = false;
+
+	spin_unlock_irqrestore(&data_lock, flags);
+out:
+	mutex_unlock(&apply_lock);
+}

@@ -215,6 +215,8 @@ int dss_wb_set_info(struct omap_dss_output *wb,
 void dss_wb_get_info(struct omap_dss_output *wb,
 		struct omap_dss_writeback_info *info);
 int omap_dss_wb_apply(struct omap_dss_output *wb);
+int dss_wb_enable(struct omap_dss_output *wb);
+void dss_wb_disable(struct omap_dss_output *wb);
 
 /* output */
 void dss_register_output(struct omap_dss_output *out);

@@ -65,6 +65,69 @@ void omapdss_writeback_set_input_size(struct omap_dss_output *wb, u16 w, u16 h)
 }
 EXPORT_SYMBOL(omapdss_writeback_set_input_size);
 
+static void writeback_config_manager(struct omap_dss_output *wb)
+{
+	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+	struct dss_lcd_mgr_config lcd_config;
+
+	dss_mgr_set_timings(wb->manager, &wb_data->input_timings);
+
+	lcd_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
+	lcd_config.stallmode = true;
+	lcd_config.fifohandcheck = false;
+	lcd_config.clock_info.lck_div = 1;
+	lcd_config.clock_info.pck_div = 1;
+	lcd_config.video_port_width = 24;
+	lcd_config.lcden_sig_polarity = false;
+
+	/*
+	 * apply lcd_config such that manager appears to be in stallmode, this
+	 * makes the manager operate in manual update mode
+	 */
+	dss_mgr_set_lcd_config(wb->manager, &lcd_config);
+
+	dss_mgr_enable(wb->manager);
+}
+
+int omapdss_writeback_enable(struct omap_dss_output *wb)
+{
+	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+	int r;
+
+	mutex_lock(&wb_data->lock);
+
+	r = dispc_runtime_get();
+	if (r)
+		goto err;
+
+	writeback_config_manager(wb);
+
+	r = dss_wb_enable(wb);
+err:
+	mutex_unlock(&wb_data->lock);
+
+	return r;
+}
+EXPORT_SYMBOL(omapdss_writeback_enable);
+
+void omapdss_writeback_disable(struct omap_dss_output *wb)
+{
+	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+
+	mutex_lock(&wb_data->lock);
+
+	dss_wb_disable(wb);
+	dss_mgr_disable(wb->manager);
+
+	dispc_runtime_put();
+
+	mutex_unlock(&wb_data->lock);
+}
+EXPORT_SYMBOL(omapdss_writeback_disable);
+
 int omapdss_writeback_apply(struct omap_dss_output *wb)
 {
 	return omap_dss_wb_apply(wb);

@@ -837,6 +837,8 @@ void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
 void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
 		struct rfbi_timings *timings);
 
+int omapdss_writeback_enable(struct omap_dss_output *wb);
+void omapdss_writeback_disable(struct omap_dss_output *wb);
 void omapdss_writeback_set_input_size(struct omap_dss_output *wb, u16 w, u16 h);
 int omapdss_writeback_apply(struct omap_dss_output *wb);
 int omapdss_writeback_set_info(struct omap_dss_output *wb,

@@ -1175,6 +1175,22 @@ int dss_mgr_set_output(struct omap_overlay_manager *mgr,
 		goto err;
 	}
 
+	if (output_is_wb(output)) {
+		enum dss_writeback_channel channel;
+
+		r = dss_writeback_calc_channel_in(mgr, &channel);
+		if (r)
+			goto err;
+
+		r = dispc_runtime_get();
+		if (r)
+			goto err;
+
+		dispc_wb_set_channel_in(channel);
+
+		dispc_runtime_put();
+	}
+
 	output->manager = mgr;
 	mgr->output = output;
 

@@ -1210,6 +1226,21 @@ int dss_mgr_unset_output(struct omap_overlay_manager *mgr)
 
 	spin_unlock_irqrestore(&data_lock, flags);
 
+	if (output_is_wb(mgr->output)) {
+		struct omap_dss_output *wb = mgr->output;
+		struct wb_priv_data *wp = get_wb_priv(wb);
+
+		spin_lock_irqsave(&data_lock, flags);
+
+		if (wp->enabled) {
+			DSSERR("WB output can't be unset when enabled\n");
+			r = -EINVAL;
+			goto err1;
+		}
+
+		spin_unlock_irqrestore(&data_lock, flags);
+	}
+
 	mgr->output->manager = NULL;
 	mgr->output = NULL;
 

@@ -540,6 +540,15 @@ int hdmi_audio_config(struct omap_dss_audio *audio);
 #ifdef CONFIG_OMAP4_DSS_WRITEBACK
 int writeback_init_platform_driver(void) __init;
 void writeback_uninit_platform_driver(void) __exit;
+int dss_writeback_calc_channel_in(struct omap_overlay_manager *mgr,
+		enum dss_writeback_channel *channel);
+#else
+static inline int dss_writeback_calc_channel_in(struct omap_overlay_manager *mgr,
+		enum dss_writeback_channel *channel)
+{
+	WARN("%s: WB not compiled in, returning 0\n", __func__);
+	return 0;
+}
 #endif
 
 /* RFBI */

@@ -48,6 +48,29 @@ static inline struct platform_device *writeback_get_wbdev_from_output(struct oma
 	return out->pdev;
 }
 
+int dss_writeback_calc_channel_in(struct omap_overlay_manager *mgr,
+		enum dss_writeback_channel *channel)
+{
+	/*
+	 * Add a case for dummy writeback manager once we support connecting
+	 * writeback directly to an overlay.
+	 */
+	switch (mgr->id) {
+	case OMAP_DSS_CHANNEL_DIGIT:
+		*channel = DSS_WB_TV_MGR;
+		break;
+	case OMAP_DSS_CHANNEL_LCD2:
+		*channel = DSS_WB_LCD2_MGR;
+		break;
+	case OMAP_DSS_CHANNEL_LCD:
+	default:
+		*channel = DSS_WB_LCD1_MGR;
+		break;
+	}
+
+	return 0;
+}
+
 void omapdss_writeback_set_input_size(struct omap_dss_output *wb, u16 w, u16 h)
 {
 	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);

@@ -114,6 +114,9 @@ struct wb_priv_data {
 	bool info_dirty;
 	struct omap_dss_writeback_info info;
 
+	/* If true, writeback output is enabled */
+	bool updating;
+
 	/*
 	 * If true in memory to memory mode, a manager is connected to it.
 	 * However, it may not be active.

@@ -285,6 +288,7 @@ static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
 static bool need_isr(void)
 {
 	const int num_mgrs = dss_feat_get_num_mgrs();
+	const int num_wbs = dss_feat_get_num_wbs();
 	int i;
 
 	for (i = 0; i < num_mgrs; ++i) {

@@ -362,6 +366,20 @@ static bool need_isr(void)
 		}
 	}
 
+	for (i = 0; i < num_wbs; i++) {
+		struct omap_dss_output *wb = omap_dss_get_writeback();
+		struct wb_priv_data *wp = get_wb_priv(wb);
+
+		if (!wp->enabled)
+			continue;
+
+		if (wb_manual_update(wb)) {
+			/* to catch FRAMEDONEWB */
+			if (wp->updating)
+				return true;
+		}
+	}
+
 	return false;
 }
 

@@ -841,6 +859,7 @@ static void dss_apply_irq_handler(void *data, u32 mask);
 static void dss_register_vsync_isr(void)
 {
 	const int num_mgrs = dss_feat_get_num_mgrs();
+	const int num_wbs = dss_feat_get_num_wbs();
 	u32 mask;
 	int r, i;
 

@@ -851,6 +870,9 @@ static void dss_register_vsync_isr(void)
 	for (i = 0; i < num_mgrs; ++i)
 		mask |= dispc_mgr_get_framedone_irq(i);
 
+	for (i = 0; i < num_wbs; i++)
+		mask |= dispc_wb_get_framedone_irq();
+
 	r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
 	WARN_ON(r);
 

@@ -860,6 +882,7 @@ static void dss_register_vsync_isr(void)
 static void dss_unregister_vsync_isr(void)
 {
 	const int num_mgrs = dss_feat_get_num_mgrs();
+	const int num_wbs = dss_feat_get_num_wbs();
 	u32 mask;
 	int r, i;
 

@@ -870,6 +893,9 @@ static void dss_unregister_vsync_isr(void)
 	for (i = 0; i < num_mgrs; ++i)
 		mask |= dispc_mgr_get_framedone_irq(i);
 
+	for (i = 0; i < num_wbs; i++)
+		mask |= dispc_wb_get_framedone_irq();
+
 	r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
 	WARN_ON(r);
 

@@ -879,6 +905,7 @@ static void dss_unregister_vsync_isr(void)
 static void dss_apply_irq_handler(void *data, u32 mask)
 {
 	const int num_mgrs = dss_feat_get_num_mgrs();
+	const int num_wbs = dss_feat_get_num_wbs();
 	int i;
 	bool extra_updating;
 

@@ -906,6 +933,16 @@ static void dss_apply_irq_handler(void *data, u32 mask)
 		}
 	}
 
+	for (i = 0; i < num_wbs; i++) {
+		struct omap_dss_output *wb = omap_dss_get_writeback();
+		struct wb_priv_data *wp = get_wb_priv(wb);
+
+		if (!wp->enabled)
+			continue;
+
+		wp->updating = dispc_wb_is_enabled();
+	}
+
 	dss_write_regs();
 	dss_set_go_bits();
 

@@ -1685,6 +1722,11 @@ void dss_wb_disable(struct omap_dss_output *wb)
 	if (!wp->enabled)
 		goto out;
 
+	if (wp->updating) {
+		DSSERR("can't disable writeback in the middle of an update\n");
+		goto out;
+	}
+
 	spin_lock_irqsave(&data_lock, flags);
 
 	wp->updating = false;

@@ -1694,3 +1736,44 @@ void dss_wb_disable(struct omap_dss_output *wb)
 out:
 	mutex_unlock(&apply_lock);
 }
+
+/*
+ * When doing a writeback mem to mem update, the updating field for writeback
+ * private data is true, but for manager private data the updating field is
+ * false. This is because a manager isn't really 'enabled' in HW, it's the
+ * writeback pipeline which initiates the transfer.
+ */
+void dss_wb_start_update(struct omap_dss_output *wb)
+{
+	struct omap_overlay_manager *mgr = wb->manager;
+	struct wb_priv_data *wp = get_wb_priv(wb);
+	unsigned long flags;
+	int r;
+
+	spin_lock_irqsave(&data_lock, flags);
+
+	WARN_ON(wp->updating);
+
+	/* add some similar check for writeback later */
+
+	r = dss_check_settings(mgr);
+	if (r) {
+		DSSERR("cannot start manual update: illegal configuration\n");
+		spin_unlock_irqrestore(&data_lock, flags);
+		return;
+	}
+
+	dss_wb_write_regs(wb);
+
+	dss_mgr_write_regs(mgr);
+	dss_mgr_write_regs_extra(mgr);
+
+	wp->updating = true;
+
+	if (!dss_data.irq_enabled && need_isr())
+		dss_register_vsync_isr();
+
+	dispc_wb_enable(true);
+
+	spin_unlock_irqrestore(&data_lock, flags);
+}

@@ -217,6 +217,7 @@ void dss_wb_get_info(struct omap_dss_output *wb,
 int omap_dss_wb_apply(struct omap_dss_output *wb);
 int dss_wb_enable(struct omap_dss_output *wb);
 void dss_wb_disable(struct omap_dss_output *wb);
+void dss_wb_start_update(struct omap_dss_output *wb);
 
 /* output */
 void dss_register_output(struct omap_dss_output *out);

@@ -20,6 +20,8 @@
 #include <linux/kernel.h>
 #include <linux/err.h>
 #include <linux/module.h>
+#include <linux/semaphore.h>
+#include <linux/workqueue.h>
 #include <linux/platform_device.h>
 
 #include <video/omapdss.h>

@@ -27,7 +29,15 @@
 #include "dss.h"
 
 struct writeback_data {
+	struct platform_device *pdev;
+
 	struct mutex lock;
+	struct semaphore bus_lock;
+
+	void (*framedone_callback)(int, void *);
+	void *framedone_data;
+
+	struct delayed_work framedone_timeout_work;
 
 	struct omap_dss_output output;
 	/*

@@ -71,6 +81,32 @@ int dss_writeback_calc_channel_in(struct omap_overlay_manager *mgr,
 	return 0;
 }
 
+void omapdss_writeback_bus_lock(struct omap_dss_output *wb)
+{
+	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+
+	down(&wb_data->bus_lock);
+}
+EXPORT_SYMBOL(omapdss_writeback_bus_lock);
+
+void omapdss_writeback_bus_unlock(struct omap_dss_output *wb)
+{
+	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+
+	up(&wb_data->bus_lock);
+}
+EXPORT_SYMBOL(omapdss_writeback_bus_unlock);
+
+static bool writeback_bus_is_locked(struct omap_dss_output *wb)
+{
+	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+
+	return wb_data->bus_lock.count = 0;
+}
+
 void omapdss_writeback_set_input_size(struct omap_dss_output *wb, u16 w, u16 h)
 {
 	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);

@@ -88,11 +124,39 @@ void omapdss_writeback_set_input_size(struct omap_dss_output *wb, u16 w, u16 h)
 }
 EXPORT_SYMBOL(omapdss_writeback_set_input_size);
 
+static void writeback_handle_framedone(struct platform_device *wbdev, int error)
+{
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+
+	wb_data->framedone_callback(error, wb_data->framedone_data);
+}
+
+static void writeback_framedone_timeout_work_callback(struct work_struct *work)
+{
+	struct writeback_data *wb_data = container_of(work,
+			struct writeback_data, framedone_timeout_work.work);
+
+	DSSERR("FRAMEDONE WB not received for 100ms\n");
+
+	writeback_handle_framedone(wb_data->pdev, -ETIMEDOUT);
+}
+
+static void writeback_framedone_irq_callback(void *data, u32 mask)
+{
+	struct platform_device *wbdev = (struct platform_device *) data;
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+
+	cancel_delayed_work(&wb_data->framedone_timeout_work);
+
+	writeback_handle_framedone(wb_data->pdev, 0);
+}
+
 static void writeback_config_manager(struct omap_dss_output *wb)
 {
 	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
 	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
 	struct dss_lcd_mgr_config lcd_config;
+	int r;
 
 	dss_mgr_set_timings(wb->manager, &wb_data->input_timings);
 

@@ -110,6 +174,11 @@ static void writeback_config_manager(struct omap_dss_output *wb)
 	 */
 	dss_mgr_set_lcd_config(wb->manager, &lcd_config);
 
+	r = omap_dispc_register_isr(writeback_framedone_irq_callback,
+		(void *) wbdev, DISPC_IRQ_FRAMEDONEWB);
+	if (r)
+		DSSERR("Failed to register for FRAMEDONEWB irq\n");
+
 	dss_mgr_enable(wb->manager);
 }
 

@@ -119,6 +188,8 @@ int omapdss_writeback_enable(struct omap_dss_output *wb)
 	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
 	int r;
 
+	WARN_ON(!writeback_bus_is_locked(wb));
+
 	mutex_lock(&wb_data->lock);
 
 	r = dispc_runtime_get();

@@ -139,18 +210,48 @@ void omapdss_writeback_disable(struct omap_dss_output *wb)
 {
 	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
 	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+	int r;
+
+	WARN_ON(!writeback_bus_is_locked(wb));
 
 	mutex_lock(&wb_data->lock);
 
 	dss_wb_disable(wb);
 	dss_mgr_disable(wb->manager);
 
+	r = omap_dispc_unregister_isr(writeback_framedone_irq_callback,
+		(void *) wbdev, DISPC_IRQ_FRAMEDONEWB);
+	if (r)
+		DSSERR("Failed to unregister FRAMEDONEWB irq\n");
+
 	dispc_runtime_put();
 
 	mutex_unlock(&wb_data->lock);
 }
 EXPORT_SYMBOL(omapdss_writeback_disable);
 
+int omapdss_writeback_update(struct omap_dss_output *wb,
+		void (*callback)(int, void *), void *data)
+{
+	struct platform_device *wbdev = writeback_get_wbdev_from_output(wb);
+	struct writeback_data *wb_data = writeback_get_drv_data(wbdev);
+	int r;
+
+	WARN_ON(!writeback_bus_is_locked(wb));
+
+	wb_data->framedone_callback = callback;
+	wb_data->framedone_data = data;
+
+	r = schedule_delayed_work(&wb_data->framedone_timeout_work,
+		msecs_to_jiffies(100));
+	BUG_ON(r = 0);
+
+	dss_wb_start_update(wb);
+
+	return 0;
+}
+EXPORT_SYMBOL(omapdss_writeback_update);
+
 int omapdss_writeback_apply(struct omap_dss_output *wb)
 {
 	return omap_dss_wb_apply(wb);