# \[PATCH 0/15\] fbdev: sh\_mipi\_dsi: care un-explained register settings

- List: linux-fbdev
- 4 messages, 3 authors
- Page: https://ratatoskr.run/linux-fbdev/2011/11/13462242/t

## \[PATCH 0/15\] fbdev: sh\_mipi\_dsi: care un-explained register settings

- From: kuninori.morimoto.gx@renesas.com
- Date: 2011-11-09 04:32:19 
- Message: https://ratatoskr.run/linux-fbdev/2011/11/13462242.md

```text

Dear Florian, Paul

These are sh_mipi_dsi update patches.

Kuninori Morimoto (15):
      fbdev: sh_mobile_lcdcfb: fixup LDHAJR :: HSYNPAJ needs mask
      fbdev: sh_mipi_dsi: tidyup dsip_clk
      fbdev: sh_mipi_dsi: typo fix of SH_MIPI_DSI_HBPBM
      fbdev: sh_mipi_dsi: tidyup VMCTR2 parameter expression
      fbdev: sh_mipi_dsi: add SH_MIPI_DSI_HFPBM flag
      fbdev: sh_mipi_dsi: add SH_MIPI_DSI_BL2E flag
      fbdev: sh_mipi_dsi: add lane control support
      fbdev: sh_mipi_dsi: add sync_pulses/sync_events/burst mode
      fbdev: sh_mipi_dsi: add VMLEN1/VMLEN2 calculation
      fbdev: sh_mipi_dsi: add set_dot_clock() for each platform
      fbdev: sh_mipi_dsi: add HSxxCLK support
      fbdev: sh_mipi_dsi: sh_mipi has pdata instead of dev
      fbdev: sh_mipi_dsi: fixup setup timing of sh_mipi_setup()
      fbdev: sh_mipi_dsi: fixup setup timing of SYSCONF
      fbdev: sh_mipi_dsi: fixup setup timing DSICTRL

SH MIPI DSI has many registers, but some registers are not explained for detail in SH manual.
This time, I asked it to Renesas MIPI guys.
These patches include this result.

for example, if your board is using AP5R chip,
HS4divCLK is needed for 1920x1080p 60Hz output.
But you can NOT find its explain and calculation method on AP5R manual.

These are based on latest linus/master tree

>> Paul

Can you please check #2, #7, #8, #10, #11 pache which modify arch/arm/mach-shmobile/xxx
```

## Re: \[PATCH 0/15\] fbdev: sh\_mipi\_dsi: care un-explained register settings

- From: Florian Tobias Schandinat \<FlorianSchandinat@gmx.de\>
- Date: 2011-11-11 15:37:54 
- Message: https://ratatoskr.run/linux-fbdev/2011/11/13462243.md

```text
Hi Guennadi, Magnus,

On 11/09/2011 04:32 AM, kuninori.morimoto.gx@renesas.com wrote:
> Dear Florian, Paul
> 
> These are sh_mipi_dsi update patches.
> 
> Kuninori Morimoto (15):
>       fbdev: sh_mobile_lcdcfb: fixup LDHAJR :: HSYNPAJ needs mask
>       fbdev: sh_mipi_dsi: tidyup dsip_clk
>       fbdev: sh_mipi_dsi: typo fix of SH_MIPI_DSI_HBPBM
>       fbdev: sh_mipi_dsi: tidyup VMCTR2 parameter expression
>       fbdev: sh_mipi_dsi: add SH_MIPI_DSI_HFPBM flag
>       fbdev: sh_mipi_dsi: add SH_MIPI_DSI_BL2E flag
>       fbdev: sh_mipi_dsi: add lane control support
>       fbdev: sh_mipi_dsi: add sync_pulses/sync_events/burst mode
>       fbdev: sh_mipi_dsi: add VMLEN1/VMLEN2 calculation
>       fbdev: sh_mipi_dsi: add set_dot_clock() for each platform
>       fbdev: sh_mipi_dsi: add HSxxCLK support
>       fbdev: sh_mipi_dsi: sh_mipi has pdata instead of dev
>       fbdev: sh_mipi_dsi: fixup setup timing of sh_mipi_setup()
>       fbdev: sh_mipi_dsi: fixup setup timing of SYSCONF
>       fbdev: sh_mipi_dsi: fixup setup timing DSICTRL

can you have a look at these patches?
After a quick glance they look okay to me, but as this is all about hardware
(which I don't know) I'd be happier if someone more qualified could have a look
at it.


Thanks,

Florian Tobias Schandinat

> SH MIPI DSI has many registers, but some registers are not explained for detail in SH manual.
> This time, I asked it to Renesas MIPI guys.
> These patches include this result.
> 
> for example, if your board is using AP5R chip,
> HS4divCLK is needed for 1920x1080p 60Hz output.
> But you can NOT find its explain and calculation method on AP5R manual.
> 
> These are based on latest linus/master tree
> 
>>> Paul
> 
> Can you please check #2, #7, #8, #10, #11 pache which modify arch/arm/mach-shmobile/xxx
> 

```

## Re: \[PATCH 0/15\] fbdev: sh\_mipi\_dsi: care un-explained register settings

- From: Magnus Damm \<magnus.damm@gmail.com\>
- Date: 2011-11-21 10:34:50 
- Message: https://ratatoskr.run/linux-fbdev/2011/11/13462244.md

```text
Hi Florian,

On Sat, Nov 12, 2011 at 12:37 AM, Florian Tobias Schandinat
[ref] wrote:
> Hi Guennadi, Magnus,
>
> On 11/09/2011 04:32 AM, kuninori.morimoto.gx@renesas.com wrote:
>> Dear Florian, Paul
>>
>> These are sh_mipi_dsi update patches.
>>
>> Kuninori Morimoto (15):
>>       fbdev: sh_mobile_lcdcfb: fixup LDHAJR :: HSYNPAJ needs mask
>>       fbdev: sh_mipi_dsi: tidyup dsip_clk
>>       fbdev: sh_mipi_dsi: typo fix of SH_MIPI_DSI_HBPBM
>>       fbdev: sh_mipi_dsi: tidyup VMCTR2 parameter expression
>>       fbdev: sh_mipi_dsi: add SH_MIPI_DSI_HFPBM flag
>>       fbdev: sh_mipi_dsi: add SH_MIPI_DSI_BL2E flag
>>       fbdev: sh_mipi_dsi: add lane control support
>>       fbdev: sh_mipi_dsi: add sync_pulses/sync_events/burst mode
>>       fbdev: sh_mipi_dsi: add VMLEN1/VMLEN2 calculation
>>       fbdev: sh_mipi_dsi: add set_dot_clock() for each platform
>>       fbdev: sh_mipi_dsi: add HSxxCLK support
>>       fbdev: sh_mipi_dsi: sh_mipi has pdata instead of dev
>>       fbdev: sh_mipi_dsi: fixup setup timing of sh_mipi_setup()
>>       fbdev: sh_mipi_dsi: fixup setup timing of SYSCONF
>>       fbdev: sh_mipi_dsi: fixup setup timing DSICTRL
>
> can you have a look at these patches?
> After a quick glance they look okay to me, but as this is all about hardware
> (which I don't know) I'd be happier if someone more qualified could have a look
> at it.

They all look fine to me. Please add:

Acked-by: Magnus Damm <redacted>

Thanks for your help,

/ magnus
```

## Re: \[PATCH 0/15\] fbdev: sh\_mipi\_dsi: care un-explained register settings

- From: Florian Tobias Schandinat \<FlorianSchandinat@gmx.de\>
- Date: 2011-11-23 06:59:07 
- Message: https://ratatoskr.run/linux-fbdev/2011/11/13462245.md

```text
Hi Magnus, Kuninori,

On 11/21/2011 10:34 AM, Magnus Damm wrote:
> Hi Florian,
> 
> On Sat, Nov 12, 2011 at 12:37 AM, Florian Tobias Schandinat
> [ref] wrote:
>> Hi Guennadi, Magnus,
>>
>> On 11/09/2011 04:32 AM, kuninori.morimoto.gx@renesas.com wrote:
>>> Dear Florian, Paul
>>>
>>> These are sh_mipi_dsi update patches.
>>>
>>> Kuninori Morimoto (15):
>>>       fbdev: sh_mobile_lcdcfb: fixup LDHAJR :: HSYNPAJ needs mask
>>>       fbdev: sh_mipi_dsi: tidyup dsip_clk
>>>       fbdev: sh_mipi_dsi: typo fix of SH_MIPI_DSI_HBPBM
>>>       fbdev: sh_mipi_dsi: tidyup VMCTR2 parameter expression
>>>       fbdev: sh_mipi_dsi: add SH_MIPI_DSI_HFPBM flag
>>>       fbdev: sh_mipi_dsi: add SH_MIPI_DSI_BL2E flag
>>>       fbdev: sh_mipi_dsi: add lane control support
>>>       fbdev: sh_mipi_dsi: add sync_pulses/sync_events/burst mode
>>>       fbdev: sh_mipi_dsi: add VMLEN1/VMLEN2 calculation
>>>       fbdev: sh_mipi_dsi: add set_dot_clock() for each platform
>>>       fbdev: sh_mipi_dsi: add HSxxCLK support
>>>       fbdev: sh_mipi_dsi: sh_mipi has pdata instead of dev
>>>       fbdev: sh_mipi_dsi: fixup setup timing of sh_mipi_setup()
>>>       fbdev: sh_mipi_dsi: fixup setup timing of SYSCONF
>>>       fbdev: sh_mipi_dsi: fixup setup timing DSICTRL
>>
>> can you have a look at these patches?
>> After a quick glance they look okay to me, but as this is all about hardware
>> (which I don't know) I'd be happier if someone more qualified could have a look
>> at it.
> 
> They all look fine to me. Please add:
> 
> Acked-by: Magnus Damm <redacted>

Thanks for having a look. I've added it to all patches and applied them to my tree.


Thanks,

Florian Tobias Schandinat
```