Hi,
I have a problem how to handle MSB framebuffer (s3c2410fb) in LSB
kernel (typical ARM kernel).
It is not a problem in 8+ bpp (bits per pixel) modes.
The problem is how to reverse pixel order in 1, 2 and 4 bpp
modes, because it does not work otherwise. Is there any fb flag
or something?
Regards,
Krzysztof
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On Mon, 2007-08-13 at 21:41 +0200, Krzysztof Helt wrote:
Hi,
I have a problem how to handle MSB framebuffer (s3c2410fb) in LSB
kernel (typical ARM kernel).
It is not a problem in 8+ bpp (bits per pixel) modes.
The problem is how to reverse pixel order in 1, 2 and 4 bpp
modes, because it does not work otherwise. Is there any fb flag
or something?
If 4bpp, ab|cd|ef is reversed as ba|dc|ef? I don't think the drawing
libraries do not support pixel reversal. Either the hardware does it, or
we create a library for this.
Tony
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Dnia 13-08-2007 o godz. 22:15 Antonino A. Daplas napisa³(a):
On Mon, 2007-08-13 at 21:41 +0200, Krzysztof Helt wrote:
quoted
Hi,
I have a problem how to handle MSB framebuffer (s3c2410fb) in
LSB
quoted
kernel (typical ARM kernel).
It is not a problem in 8+ bpp (bits per pixel) modes.
The problem is how to reverse pixel order in 1, 2 and 4 bpp
modes, because it does not work otherwise. Is there any fb
flag
quoted
or something?
If 4bpp, ab|cd|ef is reversed as ba|dc|ef?
Yes.
I don't think the drawing
libraries do not support pixel reversal. Either the hardware
does it, or
we create a library for this.
It may be not so important if it is difficult/slow. Most PDAs
uses TFT so support 8+ bpp modes. If it is not easy, this may
stay as it is (mean still broken) or these modes (1-4bpp) can be
removed than added fixed and tested if someone needs them.
Regards,
Krzysztof
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