PATCH: fbdev: intelfb - workaround for 830M

This is a work around for the 830M with intelfb.  Relative to 2.6.10.
Without this patch, updates to the DSPACNTR register will be ignored.

Signed-off-by: Andrew Pfiffer <redacted>

# This is a BitKeeper generated diff -Nru style patch.
#
# ChangeSet
#   2005/01/06 16:14:27-08:00 andrewx.k.pfiffer@intel.com 
#   On the 830M, the display plane needs to be enabled before writing
#   to any of the other bits in the DSPACNTR register.
#   
#   This patch detects the specific case, temporarily enables the plane,
#   updates the register, and then disables the plane.  It also appears
#   to require some settling time, but not an entire frame's time.
#   
#   Without this change, the pixel format fields in DSPACNTR won't get
#   written on the 830M.
#   
# 
# drivers/video/intelfb/intelfbhw.c
#   2005/01/06 16:14:08-08:00 andrewx.k.pfiffer@intel.com +14 -0
#   If we're updating the DSPACNTR register on an 830M, temporarily
enable
#   the plane before writing the register.
# 
diff -Nru a/drivers/video/intelfb/intelfbhw.c
b/drivers/video/intelfb/intelfbhw.c

--- a/drivers/video/intelfb/intelfbhw.c	2005-01-06 16:15:36 -08:00
+++ b/drivers/video/intelfb/intelfbhw.c	2005-01-06 16:15:36 -08:00

@@ -1207,6 +1207,20 @@
 	OUTREG(ADPA, tmp);
 
 	/* setup display plane */
+	if (dinfo->pdev->device == PCI_DEVICE_ID_INTEL_830M) {
+		/*
+		 *	i830M errata: the display plane must be enabled
+		 *	to allow writes to the other bits in the plane
+		 *	control register.
+		 */
+		tmp = INREG(DSPACNTR);
+		if ((tmp & DISPPLANE_PLANE_ENABLE) !=

DISPPLANE_PLANE_ENABLE) {
+			tmp |= DISPPLANE_PLANE_ENABLE;
+			OUTREG(DSPACNTR, tmp);
+			OUTREG(DSPACNTR,
hw->disp_a_ctrl|DISPPLANE_PLANE_ENABLE);
+			mdelay(1);
+		}
+	}
 	OUTREG(DSPACNTR, hw->disp_a_ctrl & ~DISPPLANE_PLANE_ENABLE);
 	OUTREG(DSPASTRIDE, hw->disp_a_stride);
 	OUTREG(DSPABASE, hw->disp_a_base);


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On Friday 07 January 2005 09:00, Pfiffer, AndrewX K wrote:

This is a work around for the 830M with intelfb.  Relative to 2.6.10.
Without this patch, updates to the DSPACNTR register will be ignored.

Can you resend?  Patch is line-wrapped.

Tony




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