[PATCH] dt-bindings: arm: omap-l3-noc: Convert to DT schema
DORMANTno replies
From: Bhargav Joshi <hidden>
Date: 2026-10-02 18:59:25
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Subsystem:
open firmware and flattened device tree bindings, the rest · Maintainers:
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Convert TI L3 NoC binding from text to DT schema format. Older OMAP3 uses the SMX variant which also acts as a bus parent with simple-bus compatible so child nodes are allowed using patternproperties. Mark ti,hwmods deprecated as it is no longer needed and only used by older omap3-l3-smx. Signed-off-by: Bhargav Joshi <redacted> --- .../devicetree/bindings/arm/omap/l3-noc.txt | 23 ---- .../bindings/arm/omap/ti,omap-l3-noc.yaml | 149 +++++++++++++++++++++ 2 files changed, 149 insertions(+), 23 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/l3-noc.txt b/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
deleted file mode 100644
index 161448da959d2..0000000000000
--- a/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
+++ /dev/null@@ -1,23 +0,0 @@ -* TI - L3 Network On Chip (NoC) - -This version is an implementation of the generic NoC IP -provided by Arteris. - -Required properties: -- compatible : Should be "ti,omap3-l3-smx" for OMAP3 family - Should be "ti,omap4-l3-noc" for OMAP4 family - Should be "ti,omap5-l3-noc" for OMAP5 family - Should be "ti,dra7-l3-noc" for DRA7 family - Should be "ti,am4372-l3-noc" for AM43 family -- reg: Contains L3 register address range for each noc domain. -- ti,hwmods: "l3_main_1", ... One hwmod for each noc domain. - -Examples: - -ocp { - compatible = "ti,omap4-l3-noc", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; -};
diff --git a/Documentation/devicetree/bindings/arm/omap/ti,omap-l3-noc.yaml b/Documentation/devicetree/bindings/arm/omap/ti,omap-l3-noc.yaml
new file mode 100644
index 0000000000000..a72a0f4e64332
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/ti,omap-l3-noc.yaml@@ -0,0 +1,149 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/omap/ti,omap-l3-noc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI OMAP L3 Network On Chip (NoC) Interconnect + +maintainers: + - Santosh Shilimkar <santosh.shilimkar@ti.com> + - Sricharan R <r.sricharan@ti.com> + +description: + The L3 interconnect is an implementation of the generic NoC IP provided by + Arteris. OMAP3 uses the SMX variant while OMAP4/5, DRA7, and AM4372 use the + NoC variant. + +properties: + compatible: + oneOf: + - items: + - const: ti,omap3-l3-smx + - const: simple-bus + - enum: + - ti,omap4-l3-noc + - ti,omap5-l3-noc + - ti,dra7-l3-noc + - ti,am4372-l3-noc + + reg: + minItems: 1 + maxItems: 3 + + interrupts: + minItems: 2 + maxItems: 2 + + ti,hwmods: + description: hwmod names for each NoC domain. + $ref: /schemas/types.yaml#/definitions/string-array + deprecated: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "^(.*@[0-9a-fA-F]+|regulator-abb-mpu)$": + type: object + +required: + - compatible + - reg + - interrupts + +allOf: + - if: + properties: + compatible: + contains: + const: ti,omap3-l3-smx + then: + properties: + reg: + maxItems: 1 + ti,hwmods: + maxItems: 1 + required: + - "#address-cells" + - "#size-cells" + - ranges + + - if: + properties: + compatible: + contains: + enum: + - ti,omap4-l3-noc + - ti,omap5-l3-noc + then: + properties: + reg: + minItems: 3 + "#address-cells": false + "#size-cells": false + ranges: false + patternProperties: + "^(.*@[0-9a-fA-F]+|regulator-abb-mpu)$": false + + - if: + properties: + compatible: + contains: + const: ti,dra7-l3-noc + then: + properties: + reg: + minItems: 2 + maxItems: 3 + "#address-cells": false + "#size-cells": false + ranges: false + patternProperties: + "^(.*@[0-9a-fA-F]+|regulator-abb-mpu)$": false + + - if: + properties: + compatible: + contains: + const: ti,am4372-l3-noc + then: + properties: + reg: + minItems: 2 + maxItems: 2 + "#address-cells": false + "#size-cells": false + ranges: false + patternProperties: + "^(.*@[0-9a-fA-F]+|regulator-abb-mpu)$": false + +additionalProperties: false + +examples: + - | + l3-noc@68000000 { + compatible = "ti,omap3-l3-smx", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = <0x68000000 0x10000>; + interrupts = <9>, <10>; + ti,hwmods = "l3_main"; + }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + l3-noc@44000000 { + compatible = "ti,omap4-l3-noc"; + reg = <0x44000000 0x1000>, + <0x44800000 0x2000>, + <0x45000000 0x1000>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + };
--- base-commit: 5e0f8396d4805a3e7f753fa58c8c55f1f3cc2160 change-id: 20261002-ti-l3-noc-28dfca81fdc5 Best regards, -- Bhargav