[PATCH] dt-bindings: Use consistent indentation in the example

@@ -288,32 +288,32 @@ examples:
       #size-cells = <0>;
 
       trig-conns@0 {
-            reg = <0>;
-            arm,trig-in-sigs = <4 5 6 7>;
-            arm,trig-in-types = <ETM_EXTOUT
-                                 ETM_EXTOUT
-                                 ETM_EXTOUT
-                                 ETM_EXTOUT>;
-            arm,trig-out-sigs = <4 5 6 7>;
-            arm,trig-out-types = <ETM_EXTIN
-                                  ETM_EXTIN
-                                  ETM_EXTIN
-                                  ETM_EXTIN>;
-            arm,cs-dev-assoc = <&etm0>;
+        reg = <0>;
+        arm,trig-in-sigs = <4 5 6 7>;
+        arm,trig-in-types = <ETM_EXTOUT
+                             ETM_EXTOUT
+                             ETM_EXTOUT
+                             ETM_EXTOUT>;
+        arm,trig-out-sigs = <4 5 6 7>;
+        arm,trig-out-types = <ETM_EXTIN
+                              ETM_EXTIN
+                              ETM_EXTIN
+                              ETM_EXTIN>;
+        arm,cs-dev-assoc = <&etm0>;
       };
 
       trig-conns@1 {
-            reg = <1>;
-            cpu = <&CPU0>;
-            arm,trig-in-sigs = <0 1>;
-            arm,trig-in-types = <PE_DBGTRIGGER
-                                 PE_PMUIRQ>;
-            arm,trig-out-sigs = <0 1 2>;
-            arm,trig-out-types = <PE_EDBGREQ
-                                  PE_DBGRESTART
-                                  PE_CTIIRQ>;
+        reg = <1>;
+        cpu = <&CPU0>;
+        arm,trig-in-sigs = <0 1>;
+        arm,trig-in-types = <PE_DBGTRIGGER
+                             PE_PMUIRQ>;
+        arm,trig-out-sigs = <0 1 2>;
+        arm,trig-out-types = <PE_EDBGREQ
+                              PE_DBGRESTART
+                              PE_CTIIRQ>;
 
-            arm,trig-filters = <0>;
+        arm,trig-filters = <0>;
       };
     };
   # Implementation defined CTI - non CoreSight component connections.

@@ -158,9 +158,9 @@ examples:
 
       out-ports {
         port {
-         turing_llm_tpdm_out: endpoint {
-           remote-endpoint = <&turing0_funnel_in1>;
-         };
+          turing_llm_tpdm_out: endpoint {
+            remote-endpoint = <&turing0_funnel_in1>;
+          };
         };
       };
     };

@@ -100,10 +100,10 @@ examples:
         ranges;
 
         usart2: serial@400e0000 {
-              compatible = "st,stm32h7-uart";
-              reg = <0x400e0000 0x400>;
-              interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
-              clocks = <&ck_flexgen_08>;
-              access-controllers = <&rifsc 32>;
+            compatible = "st,stm32h7-uart";
+            reg = <0x400e0000 0x400>;
+            interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&ck_flexgen_08>;
+            access-controllers = <&rifsc 32>;
         };
     };

@@ -97,8 +97,8 @@ examples:
       scuclk: clock-controller@1fb00000 {
         compatible = "airoha,en7581-scu";
         reg = <0x0 0x1fb00000 0x0 0x970>;
-              #clock-cells = <1>;
-              #reset-cells = <1>;
+        #clock-cells = <1>;
+        #reset-cells = <1>;
       };
     };
 

@@ -103,8 +103,8 @@ examples:
                  <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>,
                  <&scg1 IMX7ULP_CLK_ROSC>,
                  <&scg1 IMX7ULP_CLK_SPLL_BUS_CLK>;
-         clock-names = "nic1_bus_clk", "nic1_clk", "ddr_clk",
-                       "apll_pfd2", "apll_pfd1", "apll_pfd0",
-                       "upll", "sosc_bus_clk", "firc_bus_clk",
-                       "rosc", "spll_bus_clk";
+        clock-names = "nic1_bus_clk", "nic1_clk", "ddr_clk",
+                      "apll_pfd2", "apll_pfd1", "apll_pfd0",
+                      "upll", "sosc_bus_clk", "firc_bus_clk",
+                      "rosc", "spll_bus_clk";
     };

@@ -36,13 +36,6 @@ additionalProperties: false
 
 examples:
   - |
-
-    osc2_clk: osc2-clk {
-      compatible = "fixed-clock";
-      clock-frequency = <20000000>;
-      #clock-cells = <0>;
-    };
-
     soc {
         #address-cells = <2>;
         #size-cells = <2>;

@@ -918,11 +918,11 @@ examples:
 
     // Example 4 - Qualcomm SPC
     idle-states {
-      cpu_spc: cpu-spc {
-        compatible = "qcom,idle-state-spc", "arm,idle-state";
-        entry-latency-us = <150>;
-        exit-latency-us = <200>;
-        min-residency-us = <2000>;
-      };
+        cpu_spc: cpu-spc {
+            compatible = "qcom,idle-state-spc", "arm,idle-state";
+            entry-latency-us = <150>;
+            exit-latency-us = <200>;
+            min-residency-us = <2000>;
+        };
     };
 ...

@@ -95,8 +95,8 @@ examples:
                         "dma13",
                         "dma14",
                         "dma-shared-all";
-        #dma-cells = <1>;
-        brcm,dma-channel-mask = <0x7f35>;
+      #dma-cells = <1>;
+      brcm,dma-channel-mask = <0x7f35>;
     };
 
 ...

@@ -321,8 +321,8 @@ examples:
                    <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
                    /* last is eDMA2-ERR interrupt */
                    <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-       clock-names = "dma", "dmamux0";
-       clocks = <&pcc2 IMX7ULP_CLK_DMA1>, <&pcc2 IMX7ULP_CLK_DMA_MUX1>;
+      clock-names = "dma", "dmamux0";
+      clocks = <&pcc2 IMX7ULP_CLK_DMA1>, <&pcc2 IMX7ULP_CLK_DMA_MUX1>;
     };
 
   - |

@@ -55,12 +55,12 @@ examples:
         #address-cells = <2>;
         #size-cells = <2>;
         edac@f0080000 {
-          #address-cells = <2>;
-          #size-cells = <2>;
-          compatible = "amazon,al-mc-edac";
-          reg = <0x0 0xf0080000 0x0 0x00010000>;
-          interrupt-parent = <&amazon_al_system_fabric>;
-          interrupt-names = "ue";
-          interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
+            #address-cells = <2>;
+            #size-cells = <2>;
+            compatible = "amazon,al-mc-edac";
+            reg = <0x0 0xf0080000 0x0 0x00010000>;
+            interrupt-parent = <&amazon_al_system_fabric>;
+            interrupt-names = "ue";
+            interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
         };
     };

@@ -222,15 +222,15 @@ unevaluatedProperties: false
 examples:
   - |
     i2c {
-      #address-cells = <1>;
-      #size-cells = <0>;
+        #address-cells = <1>;
+        #size-cells = <0>;
 
-      eeprom@52 {
-          compatible = "microchip,24c32", "atmel,24c32";
-          reg = <0x52>;
-          pagesize = <32>;
-          wp-gpios = <&gpio1 3 0>;
-          num-addresses = <8>;
-      };
+        eeprom@52 {
+            compatible = "microchip,24c32", "atmel,24c32";
+            reg = <0x52>;
+            pagesize = <32>;
+            wp-gpios = <&gpio1 3 0>;
+            num-addresses = <8>;
+        };
     };
 ...

@@ -41,9 +41,9 @@ examples:
         #address-cells = <1>;
         #size-cells = <0>;
         usb-switch@14 {
-          compatible = "richtek,rt8973a-muic";
-          reg = <0x14>;
-          interrupt-parent = <&gpio>;
-          interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+            compatible = "richtek,rt8973a-muic";
+            reg = <0x14>;
+            interrupt-parent = <&gpio>;
+            interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
         };
     };

@@ -49,9 +49,9 @@ examples:
         #size-cells = <0>;
 
         extcon@25 {
-                compatible = "siliconmitus,sm5502-muic";
-                reg = <0x25>;
-                interrupt-parent = <&msmgpio>;
-                interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
+            compatible = "siliconmitus,sm5502-muic";
+            reg = <0x25>;
+            interrupt-parent = <&msmgpio>;
+            interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
         };
     };

@@ -82,27 +82,14 @@ additionalProperties: false
 
 examples:
   - |
-    reserved-memory {
-      #address-cells = <2>;
-      #size-cells = <2>;
-
-      service_reserved: svcbuffer@0 {
-              compatible = "shared-dma-pool";
-              reg = <0x0 0x0 0x0 0x1000000>;
-              alignment = <0x1000>;
-              no-map;
-      };
-    };
-
     firmware {
-      svc {
-        compatible = "intel,stratix10-svc";
-        method = "smc";
-        memory-region = <&service_reserved>;
+        svc {
+            compatible = "intel,stratix10-svc";
+            method = "smc";
+            memory-region = <&service_reserved>;
 
-        fpga-mgr {
-          compatible = "intel,stratix10-soc-fpga-mgr";
+            fpga-mgr {
+                compatible = "intel,stratix10-soc-fpga-mgr";
+            };
         };
-      };
     };
-

@@ -151,7 +151,7 @@ examples:
             #size-cells = <1>;
 
             soc_revision: soc-revision@0 {
-                reg = <0x0 0x4>;
+              reg = <0x0 0x4>;
             };
           };
         };

@@ -117,30 +117,30 @@ unevaluatedProperties: false
 examples:
   - |
     gpio@1f300010 {
-      compatible = "ni,169445-nand-gpio";
-      reg = <0x1f300010 0x4>;
-      reg-names = "dat";
-      gpio-controller;
-      #gpio-cells = <2>;
+        compatible = "ni,169445-nand-gpio";
+        reg = <0x1f300010 0x4>;
+        reg-names = "dat";
+        gpio-controller;
+        #gpio-cells = <2>;
     };
 
     gpio@e0100000 {
-      compatible = "wd,mbl-gpio";
-      reg-names = "dat";
-      reg = <0xe0100000 0x1>;
-      #gpio-cells = <2>;
-      gpio-controller;
-      no-output;
+        compatible = "wd,mbl-gpio";
+        reg-names = "dat";
+        reg = <0xe0100000 0x1>;
+        #gpio-cells = <2>;
+        gpio-controller;
+        no-output;
     };
 
     gpio@fffe0406 {
-      compatible = "brcm,bcm6345-gpio";
-      reg-names = "dirout", "dat";
-      reg = <0xfffe0406 2>, <0xfffe040a 2>;
-      ngpios = <15>;
-      native-endian;
-      gpio-controller;
-      #gpio-cells = <2>;
+        compatible = "brcm,bcm6345-gpio";
+        reg-names = "dirout", "dat";
+        reg = <0xfffe0406 2>, <0xfffe040a 2>;
+        ngpios = <15>;
+        native-endian;
+        gpio-controller;
+        #gpio-cells = <2>;
     };
 
     bus@c4000000 {

@@ -167,6 +167,6 @@ examples:
         gpio@d4019100 {
             reg = <0xd4019100 0x4>;
         };
-     };
+    };
 
 ...

@@ -150,4 +150,4 @@ examples:
         gpio-reserved-ranges = <17 10>;
         interrupt-controller;
         #interrupt-cells = <2>;
-     };
+    };

@@ -104,23 +104,23 @@ examples:
             vcc-supply = <&vcc>;
 
             channel@0 {
-                    reg = <0x0>;
-                    shunt-resistor-micro-ohms = <100000>;
+                reg = <0x0>;
+                shunt-resistor-micro-ohms = <100000>;
             };
 
             channel@1 {
-                    reg = <0x1>;
-                    shunt-resistor-micro-ohms = <100000>;
+                reg = <0x1>;
+                shunt-resistor-micro-ohms = <100000>;
             };
 
             channel@2 {
-                    reg = <0x2>;
-                    adi,temperature-enable;
+                reg = <0x2>;
+                adi,temperature-enable;
             };
 
             channel@3 {
-                    reg = <0x3>;
-                    adi,temperature-enable;
+                reg = <0x3>;
+                adi,temperature-enable;
             };
         };
     };

@@ -92,10 +92,10 @@ examples:
 
             regulators {
                 vout0 {
-                     regulator-name = "FPGA-2.5V";
+                    regulator-name = "FPGA-2.5V";
                 };
                 vout2 {
-                     regulator-name = "FPGA-1.5V";
+                    regulator-name = "FPGA-1.5V";
                 };
             };
         };

@@ -84,18 +84,18 @@ examples:
         ranges;
 
         interrupt-controller@10 {
-                compatible = "marvell,cp110-icu-nsr";
-                reg = <0x10 0x20>;
-                #interrupt-cells = <2>;
-                interrupt-controller;
-                msi-parent = <&gicp>;
+            compatible = "marvell,cp110-icu-nsr";
+            reg = <0x10 0x20>;
+            #interrupt-cells = <2>;
+            interrupt-controller;
+            msi-parent = <&gicp>;
         };
 
         interrupt-controller@50 {
-                compatible = "marvell,cp110-icu-sei";
-                reg = <0x50 0x10>;
-                #interrupt-cells = <2>;
-                interrupt-controller;
-                msi-parent = <&sei>;
+            compatible = "marvell,cp110-icu-sei";
+            reg = <0x50 0x10>;
+            #interrupt-cells = <2>;
+            interrupt-controller;
+            msi-parent = <&sei>;
         };
     };

@@ -272,9 +272,9 @@ examples:
         #mbox-cells = <1>;
 
         apcs_clk: clock-controller {
-          clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>;
-          clock-names = "pll", "aux";
-          #clock-cells = <0>;
+            clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>;
+            clock-names = "pll", "aux";
+            #clock-cells = <0>;
         };
     };
 

@@ -173,10 +173,10 @@ examples:
         #size-cells = <0>;
 
         flash@0 {
-          compatible = "jedec,spi-nor";
-          reg = <0>;
-          spi-max-frequency = <40000000>;
-          spi-tx-bus-width = <1>;
-          spi-rx-bus-width = <1>;
+            compatible = "jedec,spi-nor";
+            reg = <0>;
+            spi-max-frequency = <40000000>;
+            spi-tx-bus-width = <1>;
+            spi-rx-bus-width = <1>;
         };
     };

@@ -91,7 +91,7 @@ examples:
           compatible = "apple,smc-rtc";
           nvmem-cells = <&rtc_offset>;
           nvmem-cell-names = "rtc_offset";
-       };
+        };
 
         hwmon {
           compatible = "apple,smc-hwmon";

@@ -83,8 +83,8 @@ examples:
             };
 
             reset-controller {
-              compatible = "delta,tn48m-reset";
-              #reset-cells = <1>;
+                compatible = "delta,tn48m-reset";
+                #reset-cells = <1>;
             };
         };
     };

@@ -232,7 +232,7 @@ examples:
                             reg = <1>;
                             endpoint {
                                 remote-endpoint = <&usb_ss>;
-                          };
+                            };
                         };
                         port@2 {
                             reg = <2>;

@@ -516,7 +516,7 @@ examples:
                 regulator-boot-on;
             };
 
-           ldo_vcamd {
+            ldo_vcamd {
                 regulator-name = "vcamd";
                 regulator-min-microvolt = <1200000>;
                 regulator-max-microvolt = <1800000>;

@@ -52,14 +52,14 @@ examples:
         #size-cells = <0>;
 
         ec: embedded-controller@43 {
-                pinctrl-names = "default";
-                pinctrl-0 = <&pinctrl_ntxec>;
+            pinctrl-names = "default";
+            pinctrl-0 = <&pinctrl_ntxec>;
 
-                compatible = "netronix,ntxec";
-                reg = <0x43>;
-                system-power-controller;
-                interrupt-parent = <&gpio4>;
-                interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
-                #pwm-cells = <2>;
+            compatible = "netronix,ntxec";
+            reg = <0x43>;
+            system-power-controller;
+            interrupt-parent = <&gpio4>;
+            interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+            #pwm-cells = <2>;
         };
     };

@@ -90,28 +90,28 @@ examples:
     #include <dt-bindings/interrupt-controller/arm-gic.h>
 
     soc {
-      #address-cells = <2>;
-      #size-cells = <2>;
+        #address-cells = <2>;
+        #size-cells = <2>;
 
-      mmc@f723e000 {
-          compatible = "hisilicon,hi6220-dw-mshc";
-          reg = <0x0 0xf723e000 0x0 0x1000>;
-          interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
-          clocks = <&clock_sys HI6220_MMC1_CIUCLK>,
-                   <&clock_sys HI6220_MMC1_CLK>;
-          clock-names = "ciu", "biu";
-          bus-width = <4>;
-          disable-wp;
-          cap-sd-highspeed;
-          sd-uhs-sdr12;
-          sd-uhs-sdr25;
-          card-detect-delay = <200>;
-          hisilicon,peripheral-syscon = <&ao_ctrl>;
-          cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
-          pinctrl-names = "default", "idle";
-          pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>;
-          pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>;
-          vqmmc-supply = <&ldo7>;
-          vmmc-supply = <&ldo10>;
-      };
+        mmc@f723e000 {
+            compatible = "hisilicon,hi6220-dw-mshc";
+            reg = <0x0 0xf723e000 0x0 0x1000>;
+            interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&clock_sys HI6220_MMC1_CIUCLK>,
+                     <&clock_sys HI6220_MMC1_CLK>;
+            clock-names = "ciu", "biu";
+            bus-width = <4>;
+            disable-wp;
+            cap-sd-highspeed;
+            sd-uhs-sdr12;
+            sd-uhs-sdr25;
+            card-detect-delay = <200>;
+            hisilicon,peripheral-syscon = <&ao_ctrl>;
+            cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+            pinctrl-names = "default", "idle";
+            pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>;
+            pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>;
+            vqmmc-supply = <&ldo7>;
+            vmmc-supply = <&ldo10>;
+        };
     };

@@ -33,14 +33,14 @@ unevaluatedProperties: false
 examples:
   - |
     partitions {
-      compatible = "fixed-partitions";
-      #address-cells = <1>;
-      #size-cells = <1>;
+        compatible = "fixed-partitions";
+        #address-cells = <1>;
+        #size-cells = <1>;
 
-      /* ... */
+        /* ... */
 
-      };
-      art: art@1200000 {
+    };
+    art: art@1200000 {
         compatible = "nvmem-cells";
         reg = <0x1200000 0x0140000>;
         label = "art";

@@ -49,21 +49,21 @@ examples:
         #size-cells = <1>;
 
         macaddr_gmac1: macaddr_gmac1@0 {
-          reg = <0x0 0x6>;
+            reg = <0x0 0x6>;
         };
 
         macaddr_gmac2: macaddr_gmac2@6 {
-          reg = <0x6 0x6>;
+            reg = <0x6 0x6>;
         };
 
         pre_cal_24g: pre_cal_24g@1000 {
-          reg = <0x1000 0x2f20>;
+            reg = <0x1000 0x2f20>;
         };
 
         pre_cal_5g: pre_cal_5g@5000{
-          reg = <0x5000 0x2f20>;
+            reg = <0x5000 0x2f20>;
         };
-      };
+    };
   - |
     partitions {
         compatible = "fixed-partitions";

@@ -52,6 +52,6 @@ examples:
         partitions-table-offset = <0x100000>;
 
         partition-file-system {
-                linux,rootfs;
+            linux,rootfs;
         };
     };

@@ -41,7 +41,7 @@ examples:
             #size-cells = <1>;
 
             shift_sel_port0_tx_a: shift-sel-port0-tx-a@c {
-               reg = <0xc 0x4>;
+                reg = <0xc 0x4>;
             };
 
             shift_sel_port0_tx_b: shift-sel-port0-tx-b@10 {

@@ -53,23 +53,23 @@ examples:
             };
 
             shift_sel_port0_tx_d: shift-sel-port0-tx-d@18 {
-               reg = <0x18 0x4>;
+                reg = <0x18 0x4>;
             };
 
             shift_sel_port1_tx_a: shift-sel-port1-tx-a@1c {
-               reg = <0x1c 0x4>;
+                reg = <0x1c 0x4>;
             };
 
             shift_sel_port1_tx_b: shift-sel-port1-tx-b@20 {
-               reg = <0x20 0x4>;
+                reg = <0x20 0x4>;
             };
 
             shift_sel_port1_tx_c: shift-sel-port1-tx-c@24 {
-               reg = <0x24 0x4>;
+                reg = <0x24 0x4>;
             };
 
             shift_sel_port1_tx_d: shift-sel-port1-tx-d@28 {
-               reg = <0x28 0x4>;
+                reg = <0x28 0x4>;
             };
 
             shift_sel_port2_tx_a: shift-sel-port2-tx-a@2c {

@@ -97,11 +97,11 @@ examples:
             };
 
             shift_sel_port3_tx_c: shift-sel-port3-tx-c@54 {
-               reg = <0x54 0x4>;
+                reg = <0x54 0x4>;
             };
 
             shift_sel_port3_tx_d: shift-sel-port3-tx-d@58 {
-               reg = <0x58 0x4>;
+                reg = <0x58 0x4>;
             };
 
             shift_sel_port4_tx_a: shift-sel-port4-tx-a@5c {

@@ -60,7 +60,7 @@ examples:
         #size-cells = <0>;
 
         efuse-bank@0 {
-           reg = <0>;
+            reg = <0>;
         };
     };
 

@@ -64,16 +64,16 @@ examples:
         #address-cells = <1>;
         #size-cells = <1>;
         therm_calib: thermal-calibration@14 {
-          reg = <0x14 0x3>;
+            reg = <0x14 0x3>;
         };
         disc_vol: disconnect-voltage@18 {
-          reg = <0x18 0x2>;
+            reg = <0x18 0x2>;
         };
         mac_addr0: mac-address0@34 {
-          reg = <0x34 0x6>;
+            reg = <0x34 0x6>;
         };
         mac_addr1: mac-address1@3a {
-          reg = <0x3a 0x6>;
+            reg = <0x3a 0x6>;
         };
     };
 ...

@@ -352,9 +352,9 @@ examples:
                             <0 0 0 3 &pcie_intc 2>,
                             <0 0 0 4 &pcie_intc 3>;
             pcie_intc: interrupt-controller {
-                      #address-cells = <0>;
-                      #interrupt-cells = <1>;
-                      interrupt-controller;
+                #address-cells = <0>;
+                #interrupt-cells = <1>;
+                interrupt-controller;
             };
         };
     };

@@ -144,14 +144,14 @@ examples:
         spacemit,apmu = <&syscon_apmu 0x3d4>;
 
         pcie@0 {
-          device_type = "pci";
-          compatible = "pciclass,0604";
-          reg = <0x0 0x0 0x0 0x0 0x0>;
-          bus-range = <0x01 0xff>;
-          #address-cells = <3>;
-          #size-cells = <2>;
-          ranges;
-          phys = <&pcie1_phy>;
-          vpcie3v3-supply = <&pcie_vcc_3v3>;
+            device_type = "pci";
+            compatible = "pciclass,0604";
+            reg = <0x0 0x0 0x0 0x0 0x0>;
+            bus-range = <0x01 0xff>;
+            #address-cells = <3>;
+            #size-cells = <2>;
+            ranges;
+            phys = <&pcie1_phy>;
+            vpcie3v3-supply = <&pcie_vcc_3v3>;
         };
     };

@@ -100,9 +100,9 @@ examples:
                   <0x6 0x00000000 0x0 0x10000000>;
             reg-names = "cpm_slcr", "cfg";
             pcie_intc_0: interrupt-controller {
-                    #address-cells = <0>;
-                    #interrupt-cells = <1>;
-                    interrupt-controller;
+                #address-cells = <0>;
+                #interrupt-cells = <1>;
+                interrupt-controller;
             };
         };
 

@@ -66,12 +66,12 @@ examples:
       #size-cells = <0>;
 
       pcie0_phy: pcie-phy@0 {
-          reg = <0>;
-          #phy-cells = <0>;
+        reg = <0>;
+        #phy-cells = <0>;
       };
 
       pcie1_phy: pcie-phy@1 {
-          reg = <1>;
-          #phy-cells = <0>;
+        reg = <1>;
+        #phy-cells = <0>;
       };
     };

@@ -133,12 +133,12 @@ examples:
         #size-cells = <0>;
 
         sata-phy@0 {
-                reg = <0>;
-                #phy-cells = <0>;
+            reg = <0>;
+            #phy-cells = <0>;
         };
 
         sata-phy@1 {
-                reg = <1>;
-                #phy-cells = <0>;
+            reg = <1>;
+            #phy-cells = <0>;
         };
     };

@@ -245,55 +245,55 @@ examples:
     #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
 
     phy@88eb000 {
-      compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
-      reg = <0x088eb000 0x4000>;
+        compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
+        reg = <0x088eb000 0x4000>;
 
-      clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
-               <&gcc GCC_USB4_EUD_CLKREF_CLK>,
-               <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
-               <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
-      clock-names = "aux", "ref", "com_aux", "usb3_pipe";
+        clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
+                 <&gcc GCC_USB4_EUD_CLKREF_CLK>,
+                 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+                 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+        clock-names = "aux", "ref", "com_aux", "usb3_pipe";
 
-      power-domains = <&gcc USB30_PRIM_GDSC>;
+        power-domains = <&gcc USB30_PRIM_GDSC>;
 
-      resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
-               <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
-      reset-names = "phy", "common";
+        resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
+                 <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
+        reset-names = "phy", "common";
 
-      vdda-phy-supply = <&vreg_l9d>;
-      vdda-pll-supply = <&vreg_l4d>;
+        vdda-phy-supply = <&vreg_l9d>;
+        vdda-pll-supply = <&vreg_l4d>;
 
-      orientation-switch;
+        orientation-switch;
 
-      #clock-cells = <1>;
-      #phy-cells = <1>;
+        #clock-cells = <1>;
+        #phy-cells = <1>;
 
-      ports {
-          #address-cells = <1>;
-          #size-cells = <0>;
+        ports {
+            #address-cells = <1>;
+            #size-cells = <0>;
 
-          port@0 {
-              reg = <0>;
+            port@0 {
+                reg = <0>;
 
-              endpoint {
-                  remote-endpoint = <&typec_connector_ss>;
-              };
-          };
+                endpoint {
+                    remote-endpoint = <&typec_connector_ss>;
+                };
+            };
 
-          port@1 {
-              reg = <1>;
+            port@1 {
+                reg = <1>;
 
-              endpoint {
-                  remote-endpoint = <&dwc3_ss_out>;
-              };
-          };
+                endpoint {
+                    remote-endpoint = <&dwc3_ss_out>;
+                };
+            };
 
-          port@2 {
-              reg = <2>;
+            port@2 {
+                reg = <2>;
 
-              endpoint {
-                  remote-endpoint = <&mdss_dp_out>;
-              };
-          };
-      };
+                endpoint {
+                    remote-endpoint = <&mdss_dp_out>;
+                };
+            };
+        };
     };

@@ -121,6 +121,6 @@ examples:
 
         input-voltage-limit-microvolt = <4500000>;
         input-current-limit-microamp = <2400000>;
-       };
+      };
     };
 ...

@@ -70,8 +70,8 @@ examples:
                 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB
                 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11
            >;
-           cellwise,monitor-interval-ms = <5000>;
-           monitored-battery = <&bat>;
-           power-supplies = <&mains_charger>, <&usb_charger>;
-       };
+            cellwise,monitor-interval-ms = <5000>;
+            monitored-battery = <&bat>;
+            power-supplies = <&mains_charger>, <&usb_charger>;
+        };
     };

@@ -47,5 +47,5 @@ examples:
             interrupts-extended = <&gpio5 2 IRQ_TYPE_EDGE_BOTH>,
                                   <&gpio3 21 IRQ_TYPE_EDGE_BOTH>;
             interrupt-names = "a_det", "alert";
-       };
+        };
     };

@@ -80,5 +80,5 @@ examples:
             sbs,poll-retry-count = <10>;
             sbs,battery-detect-gpios = <&gpio 122 GPIO_ACTIVE_HIGH>;
             sbs,disable-charger-broadcasts;
-       };
+        };
     };

@@ -51,5 +51,5 @@ examples:
             reg = <0x9>;
             interrupt-parent = <&gpio6>;
             interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
-       };
+        };
     };

@@ -93,26 +93,26 @@ examples:
         #address-cells = <1>;
         #size-cells = <0>;
 
-       pwm@0 {
-           compatible = "nxp,mc33xs2410";
-           reg = <0x0>;
-           spi-max-frequency = <4000000>;
-           spi-cpha;
-           spi-cs-setup-delay-ns = <100>;
-           spi-cs-hold-delay-ns = <10>;
-           spi-cs-inactive-delay-ns = <300>;
-           reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
-           #pwm-cells = <3>;
-           pwm-names = "di0", "di1", "di2", "di3";
-           pwms = <&pwm0 0 1000000>,
-                  <&pwm1 0 1000000>,
-                  <&pwm2 0 1000000>,
-                  <&pwm3 0 1000000>;
-           interrupt-parent = <&gpio0>;
-           interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
-           clocks = <&clk_ext_fixed>;
-           vdd-supply = <&reg_3v3>;
-           vspi-supply = <&reg_3v3>;
-           vpwr-supply = <&reg_24v0>;
-       };
+        pwm@0 {
+            compatible = "nxp,mc33xs2410";
+            reg = <0x0>;
+            spi-max-frequency = <4000000>;
+            spi-cpha;
+            spi-cs-setup-delay-ns = <100>;
+            spi-cs-hold-delay-ns = <10>;
+            spi-cs-inactive-delay-ns = <300>;
+            reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+            #pwm-cells = <3>;
+            pwm-names = "di0", "di1", "di2", "di3";
+            pwms = <&pwm0 0 1000000>,
+                   <&pwm1 0 1000000>,
+                   <&pwm2 0 1000000>,
+                   <&pwm3 0 1000000>;
+            interrupt-parent = <&gpio0>;
+            interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
+            clocks = <&clk_ext_fixed>;
+            vdd-supply = <&reg_3v3>;
+            vspi-supply = <&reg_3v3>;
+            vpwr-supply = <&reg_24v0>;
+        };
     };

@@ -37,12 +37,12 @@ examples:
   - |
     #include <dt-bindings/clock/thead,th1520-clk-ap.h>
     soc {
-      #address-cells = <2>;
-      #size-cells = <2>;
-      pwm@ffec01c000 {
-          compatible = "thead,th1520-pwm";
-          reg = <0xff 0xec01c000 0x0 0x4000>;
-          clocks = <&clk CLK_PWM>;
-          #pwm-cells = <3>;
-      };
+        #address-cells = <2>;
+        #size-cells = <2>;
+        pwm@ffec01c000 {
+            compatible = "thead,th1520-pwm";
+            reg = <0xff 0xec01c000 0x0 0x4000>;
+            clocks = <&clk CLK_PWM>;
+            #pwm-cells = <3>;
+        };
     };

@@ -121,5 +121,5 @@ examples:
             ti,sci = <&dmsc>;
             ti,sci-dev-id = <9>;
             ti,sci-proc-ids = <0x18 0xff>;
-         };
+        };
     };

@@ -167,47 +167,47 @@ examples:
         #size-cells = <0>;
         timebase-frequency = <1000000>;
         cpu@0 {
-                clock-frequency = <0>;
-                compatible = "sifive,rocket0", "riscv";
-                device_type = "cpu";
-                i-cache-block-size = <64>;
-                i-cache-sets = <128>;
-                i-cache-size = <16384>;
-                reg = <0>;
-                riscv,isa-base = "rv64i";
-                riscv,isa-extensions = "i", "m", "a", "c";
+            clock-frequency = <0>;
+            compatible = "sifive,rocket0", "riscv";
+            device_type = "cpu";
+            i-cache-block-size = <64>;
+            i-cache-sets = <128>;
+            i-cache-size = <16384>;
+            reg = <0>;
+            riscv,isa-base = "rv64i";
+            riscv,isa-extensions = "i", "m", "a", "c";
 
-                cpu_intc0: interrupt-controller {
-                        #interrupt-cells = <1>;
-                        compatible = "riscv,cpu-intc";
-                        interrupt-controller;
-                };
+            cpu_intc0: interrupt-controller {
+                #interrupt-cells = <1>;
+                compatible = "riscv,cpu-intc";
+                interrupt-controller;
+            };
         };
         cpu@1 {
-                clock-frequency = <0>;
-                compatible = "sifive,rocket0", "riscv";
-                d-cache-block-size = <64>;
-                d-cache-sets = <64>;
-                d-cache-size = <32768>;
-                d-tlb-sets = <1>;
-                d-tlb-size = <32>;
-                device_type = "cpu";
-                i-cache-block-size = <64>;
-                i-cache-sets = <64>;
-                i-cache-size = <32768>;
-                i-tlb-sets = <1>;
-                i-tlb-size = <32>;
-                mmu-type = "riscv,sv39";
-                reg = <1>;
-                tlb-split;
-                riscv,isa-base = "rv64i";
-                riscv,isa-extensions = "i", "m", "a", "f", "d", "c";
+            clock-frequency = <0>;
+            compatible = "sifive,rocket0", "riscv";
+            d-cache-block-size = <64>;
+            d-cache-sets = <64>;
+            d-cache-size = <32768>;
+            d-tlb-sets = <1>;
+            d-tlb-size = <32>;
+            device_type = "cpu";
+            i-cache-block-size = <64>;
+            i-cache-sets = <64>;
+            i-cache-size = <32768>;
+            i-tlb-sets = <1>;
+            i-tlb-size = <32>;
+            mmu-type = "riscv,sv39";
+            reg = <1>;
+            tlb-split;
+            riscv,isa-base = "rv64i";
+            riscv,isa-extensions = "i", "m", "a", "f", "d", "c";
 
-                cpu_intc1: interrupt-controller {
-                        #interrupt-cells = <1>;
-                        compatible = "riscv,cpu-intc";
-                        interrupt-controller;
-                };
+            cpu_intc1: interrupt-controller {
+                #interrupt-cells = <1>;
+                compatible = "riscv,cpu-intc";
+                interrupt-controller;
+            };
         };
     };
 

@@ -217,18 +217,18 @@ examples:
         #address-cells = <1>;
         #size-cells = <0>;
         cpu@0 {
-                device_type = "cpu";
-                reg = <0>;
-                compatible = "riscv";
-                mmu-type = "riscv,sv48";
-                riscv,isa-base = "rv64i";
-                riscv,isa-extensions = "i", "m", "a", "f", "d", "c";
+            device_type = "cpu";
+            reg = <0>;
+            compatible = "riscv";
+            mmu-type = "riscv,sv48";
+            riscv,isa-base = "rv64i";
+            riscv,isa-extensions = "i", "m", "a", "f", "d", "c";
 
-                interrupt-controller {
-                        #interrupt-cells = <1>;
-                        interrupt-controller;
-                        compatible = "riscv,cpu-intc";
-                };
+            interrupt-controller {
+                #interrupt-cells = <1>;
+                interrupt-controller;
+                compatible = "riscv,cpu-intc";
+            };
         };
     };
 ...

@@ -87,17 +87,17 @@ examples:
         #size-cells = <0>;
 
         rtc@51 {
-          compatible = "nxp,pcf85063a";
-          reg = <0x51>;
-          quartz-load-femtofarads = <12500>;
+            compatible = "nxp,pcf85063a";
+            reg = <0x51>;
+            quartz-load-femtofarads = <12500>;
 
-          clock {
-            compatible = "fixed-clock";
-            #clock-cells = <0>;
-            clock-frequency = <32768>;
-          };
+            clock {
+                compatible = "fixed-clock";
+                #clock-cells = <0>;
+                clock-frequency = <32768>;
+            };
         };
-      };
+    };
 
   - |
     spi {

@@ -84,13 +84,13 @@ examples:
             #address-cells = <1>;
             #size-cells = <0>;
             slim@1 {
-              reg = <1>;
-              #address-cells = <2>;
-              #size-cells = <0>;
-              codec@1,0 {
-                compatible = "slim217,1a0";
-                reg = <1 0>;
-              };
+                reg = <1>;
+                #address-cells = <2>;
+                #size-cells = <0>;
+                codec@1,0 {
+                    compatible = "slim217,1a0";
+                    reg = <1 0>;
+                };
             };
-          };
         };
+    };

@@ -67,4 +67,4 @@ examples:
                          "fsl,cpm-muram-data";
             reg = <0 0xc000>;
         };
-     };
+    };

@@ -129,8 +129,8 @@ examples:
         };
 
         siram@1000 {
-          compatible = "fsl,t1040-qe-siram";
-          reg = <0x1000 0x800>;
+            compatible = "fsl,t1040-qe-siram";
+            reg = <0x1000 0x800>;
         };
 
         muram@10000 {

@@ -139,10 +139,10 @@ examples:
             #address-cells = <1>;
             #size-cells = <1>;
 
-              data-only@0{
-                  compatible = "fsl,qe-muram-data",
-                              "fsl,cpm-muram-data";
-                  reg = <0 0xc000>;
-              };
+            data-only@0{
+                compatible = "fsl,qe-muram-data",
+                             "fsl,cpm-muram-data";
+                reg = <0 0xc000>;
+            };
         };
     };

@@ -87,8 +87,8 @@ examples:
                <&clk IMX8MM_CLK_DSI_PHY_REF>,
                <&clk IMX8MM_CLK_CSI1_CORE>,
                <&clk IMX8MM_CLK_CSI1_PHY_REF>;
-       clock-names = "csi-bridge-axi", "csi-bridge-apb", "csi-bridge-core",
-                     "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk",
-                     "dsi-ref", "csi-aclk", "csi-pclk";
-       #power-domain-cells = <1>;
+      clock-names = "csi-bridge-axi", "csi-bridge-apb", "csi-bridge-core",
+                    "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk",
+                    "dsi-ref", "csi-aclk", "csi-pclk";
+      #power-domain-cells = <1>;
     };

@@ -90,8 +90,8 @@ examples:
                <&clk IMX8MN_CLK_DSI_PHY_REF>,
                <&clk IMX8MN_CLK_CSI1_PHY_REF>,
                <&clk IMX8MN_CLK_CAMERA_PIXEL_ROOT>;
-       clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root",
-                     "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk",
-                     "dsi-ref", "csi-aclk", "csi-pclk";
-       #power-domain-cells = <1>;
+      clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root",
+                    "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk",
+                    "dsi-ref", "csi-aclk", "csi-pclk";
+      #power-domain-cells = <1>;
     };

@@ -173,8 +173,8 @@ examples:
                <&clk IMX93_CLK_ISI_GATE>,
                <&clk IMX93_CLK_MIPI_CSI_GATE>,
                <&clk IMX93_CLK_MIPI_DSI_GATE>;
-               clock-names = "apb", "axi", "nic", "disp", "cam",
-                             "pxp", "lcdif", "isi", "csi", "dsi";
+      clock-names = "apb", "axi", "nic", "disp", "cam",
+                    "pxp", "lcdif", "isi", "csi", "dsi";
       #address-cells = <1>;
       #size-cells = <1>;
       #power-domain-cells = <1>;

@@ -68,17 +68,17 @@ examples:
                 compatible = "mediatek,mt8195-dvfsrc-regulator";
 
                 dvfsrc_vcore: dvfsrc-vcore {
-                        regulator-name = "dvfsrc-vcore";
-                        regulator-min-microvolt = <550000>;
-                        regulator-max-microvolt = <750000>;
-                        regulator-always-on;
+                    regulator-name = "dvfsrc-vcore";
+                    regulator-min-microvolt = <550000>;
+                    regulator-max-microvolt = <750000>;
+                    regulator-always-on;
                 };
 
                 dvfsrc_vscp: dvfsrc-vscp {
-                        regulator-name = "dvfsrc-vscp";
-                        regulator-min-microvolt = <550000>;
-                        regulator-max-microvolt = <750000>;
-                        regulator-always-on;
+                    regulator-name = "dvfsrc-vscp";
+                    regulator-min-microvolt = <550000>;
+                    regulator-max-microvolt = <750000>;
+                    regulator-always-on;
                 };
             };
 

@@ -177,7 +177,7 @@ examples:
                           <WAKE_TCS    3>,
                           <CONTROL_TCS 1>;
         power-domains = <&CLUSTER_PD>;
-      };
+    };
 
   - |
     // For a TCS whose RSC base address is 0xAF20000 and is at DRV id of 0, the

@@ -374,7 +374,7 @@ examples:
           #phy-cells = <0>;
           interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
           interrupt-names = "linestate";
-         };
+        };
 
         u2phy0_otg: otg-port {
           #phy-cells = <0>;

@@ -86,7 +86,7 @@ examples:
                   <0x0 0x31120000 0x0 0x100>,
                   <0x0 0x33000000 0x0 0x40000>,
                   <0x0 0x31080000 0x0 0x40000>;
-                  reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
+            reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
             ti,num-rings = <818>;
             ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
             ti,sci = <&dmsc>;

@@ -58,25 +58,25 @@ unevaluatedProperties: false
 examples:
   - |
     sfc0: spi@fe08d000 {
-      compatible = "amlogic,a4-spifc";
-      reg = <0xfe08d000 0x800>;
-      clocks = <&clkc_periphs 31>,
-               <&clkc_periphs 102>;
-      clock-names = "gate", "core";
+        compatible = "amlogic,a4-spifc";
+        reg = <0xfe08d000 0x800>;
+        clocks = <&clkc_periphs 31>,
+                 <&clkc_periphs 102>;
+        clock-names = "gate", "core";
 
-      pinctrl-0 = <&spiflash_default>;
-      pinctrl-names = "default";
+        pinctrl-0 = <&spiflash_default>;
+        pinctrl-names = "default";
 
-      #address-cells = <1>;
-      #size-cells = <0>;
+        #address-cells = <1>;
+        #size-cells = <0>;
 
-      flash@0 {
-          compatible = "spi-nand";
-          reg = <0>;
-          #address-cells = <1>;
-          #size-cells = <1>;
-          nand-ecc-engine = <&sfc0>;
-          nand-ecc-strength = <8>;
-          nand-ecc-step-size = <512>;
-      };
+        flash@0 {
+            compatible = "spi-nand";
+            reg = <0>;
+            #address-cells = <1>;
+            #size-cells = <1>;
+            nand-ecc-engine = <&sfc0>;
+            nand-ecc-strength = <8>;
+            nand-ecc-step-size = <512>;
+        };
     };

@@ -67,13 +67,13 @@ unevaluatedProperties: false
 examples:
   - |
     spi@10600 {
-      compatible = "marvell,orion-spi";
-      #address-cells = <1>;
-      #size-cells = <0>;
-      cell-index = <0>;
-      reg = <0x10600 0x28>;
-      clocks = <&coreclk 0>;
-      interrupts = <23>;
+        compatible = "marvell,orion-spi";
+        #address-cells = <1>;
+        #size-cells = <0>;
+        cell-index = <0>;
+        reg = <0x10600 0x28>;
+        clocks = <&coreclk 0>;
+        interrupts = <23>;
     };
   - |
     #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))

@@ -83,20 +83,20 @@ examples:
         #size-cells = <1>;
 
         spi@10600 {
-          compatible = "marvell,orion-spi";
-          #address-cells = <1>;
-          #size-cells = <0>;
-          cell-index = <0>;
-          reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */
-                <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
-                <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
-                <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
-                <MBUS_ID(0x01, 0xde) 0 0xffffffff>, /* CS3 */
-                <MBUS_ID(0x01, 0x1f) 0 0xffffffff>, /* CS4 */
-                <MBUS_ID(0x01, 0x5f) 0 0xffffffff>, /* CS5 */
-                <MBUS_ID(0x01, 0x9f) 0 0xffffffff>, /* CS6 */
-                <MBUS_ID(0x01, 0xdf) 0 0xffffffff>; /* CS7 */
-          clocks = <&coreclk 0>;
-          interrupts = <23>;
+            compatible = "marvell,orion-spi";
+            #address-cells = <1>;
+            #size-cells = <0>;
+            cell-index = <0>;
+            reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */
+                  <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
+                  <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
+                  <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
+                  <MBUS_ID(0x01, 0xde) 0 0xffffffff>, /* CS3 */
+                  <MBUS_ID(0x01, 0x1f) 0 0xffffffff>, /* CS4 */
+                  <MBUS_ID(0x01, 0x5f) 0 0xffffffff>, /* CS5 */
+                  <MBUS_ID(0x01, 0x9f) 0 0xffffffff>, /* CS6 */
+                  <MBUS_ID(0x01, 0xdf) 0 0xffffffff>; /* CS7 */
+            clocks = <&coreclk 0>;
+            interrupts = <23>;
         };
     };

@@ -46,76 +46,76 @@ examples:
     };
 
     thermal-zones {
-      ihost0_thermal: ihost0-thermal {
-        polling-delay-passive = <0>;
-        polling-delay = <1000>;
-        thermal-sensors = <&tmon 0>;
-        trips {
-          cpu-crit {
-            temperature = <105000>;
-            hysteresis = <0>;
-            type = "critical";
-          };
+        ihost0_thermal: ihost0-thermal {
+            polling-delay-passive = <0>;
+            polling-delay = <1000>;
+            thermal-sensors = <&tmon 0>;
+            trips {
+                cpu-crit {
+                    temperature = <105000>;
+                    hysteresis = <0>;
+                    type = "critical";
+                };
+            };
         };
-      };
-      ihost1_thermal: ihost1-thermal {
-        polling-delay-passive = <0>;
-        polling-delay = <1000>;
-        thermal-sensors = <&tmon 1>;
-        trips {
-          cpu-crit {
-            temperature = <105000>;
-            hysteresis = <0>;
-            type = "critical";
-          };
+        ihost1_thermal: ihost1-thermal {
+            polling-delay-passive = <0>;
+            polling-delay = <1000>;
+            thermal-sensors = <&tmon 1>;
+            trips {
+                cpu-crit {
+                    temperature = <105000>;
+                    hysteresis = <0>;
+                    type = "critical";
+                };
+            };
         };
-      };
-      ihost2_thermal: ihost2-thermal {
-        polling-delay-passive = <0>;
-        polling-delay = <1000>;
-        thermal-sensors = <&tmon 2>;
-        trips {
-          cpu-crit {
-            temperature = <105000>;
-            hysteresis = <0>;
-            type = "critical";
-          };
+        ihost2_thermal: ihost2-thermal {
+            polling-delay-passive = <0>;
+            polling-delay = <1000>;
+            thermal-sensors = <&tmon 2>;
+            trips {
+                cpu-crit {
+                    temperature = <105000>;
+                    hysteresis = <0>;
+                    type = "critical";
+                };
+            };
         };
-      };
-      ihost3_thermal: ihost3-thermal {
-        polling-delay-passive = <0>;
-        polling-delay = <1000>;
-        thermal-sensors = <&tmon 3>;
-        trips {
-          cpu-crit {
-            temperature = <105000>;
-            hysteresis = <0>;
-            type = "critical";
-          };
+        ihost3_thermal: ihost3-thermal {
+            polling-delay-passive = <0>;
+            polling-delay = <1000>;
+            thermal-sensors = <&tmon 3>;
+            trips {
+                cpu-crit {
+                    temperature = <105000>;
+                    hysteresis = <0>;
+                    type = "critical";
+                };
+            };
         };
-      };
-      crmu_thermal: crmu-thermal {
-        polling-delay-passive = <0>;
-        polling-delay = <1000>;
-        thermal-sensors = <&tmon 4>;
-        trips {
-          cpu-crit {
-            temperature = <105000>;
-            hysteresis = <0>;
-            type = "critical";
-          };
+        crmu_thermal: crmu-thermal {
+            polling-delay-passive = <0>;
+            polling-delay = <1000>;
+            thermal-sensors = <&tmon 4>;
+            trips {
+                cpu-crit {
+                    temperature = <105000>;
+                    hysteresis = <0>;
+                    type = "critical";
+                };
+            };
         };
-      };
-      nitro_thermal: nitro-thermal {
-        polling-delay-passive = <0>;
-        polling-delay = <1000>;
-        thermal-sensors = <&tmon 5>;
-        trips {
-          cpu-crit {
-            temperature = <105000>;
-            hysteresis = <0>;
-            type = "critical";
-          };
+        nitro_thermal: nitro-thermal {
+            polling-delay-passive = <0>;
+            polling-delay = <1000>;
+            thermal-sensors = <&tmon 5>;
+            trips {
+                cpu-crit {
+                    temperature = <105000>;
+                    hysteresis = <0>;
+                    type = "critical";
+                };
+            };
         };
-      };
     };

@@ -62,4 +62,4 @@ examples:
         clocks = <&clk_8m>;
         clock-names = "per";
         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
-     };
+    };

@@ -42,4 +42,4 @@ examples:
         compatible = "microchip,pic32mzda-dmt";
         reg = <0x1f800a00 0x80>;
         clocks = <&rootclk PB7CLK>;
-       };
+    };

@@ -46,10 +46,10 @@ examples:
         #address-cells = <2>;
         #size-cells = <2>;
         wdt1: watchdog@40440000 {
-          compatible = "nuvoton,ma35d1-wdt";
-          reg = <0x0 0x40440000 0x0 0x100>;
-          interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
-          clocks = <&clk WDT1_GATE>;
+            compatible = "nuvoton,ma35d1-wdt";
+            reg = <0x0 0x40440000 0x0 0x100>;
+            interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&clk WDT1_GATE>;
         };
     };
 ...