From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Date: 2026-01-08 11:02:32
This series adds SoC compatibles to the EIP97/EIP197 binding, and also
fixes all of the devicetrees to actually declare those in their nodes.
The only platforms using this binding are Marvell and MediaTek.
AngeloGioacchino Del Regno (4):
dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs
dt-bindings: crypto: inside-secure,safexcel: Add SoC compatibles
arm64: dts: marvell: Add SoC specific compatibles to SafeXcel crypto
arm64: dts: mediatek: mt7986a: Change compatible for SafeXcel crypto
.../bindings/crypto/inside-secure,safexcel.yaml | 10 ++++++++++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 3 ++-
arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 3 ++-
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +-
4 files changed, 15 insertions(+), 3 deletions(-)
--
2.52.0
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Date: 2026-01-08 11:02:34
Add SoC specific compatibles for the SafeXcel crypto engine,
including one for the EIP197B used by Marvell Armada CP110 and
and two for the EIP97IES used by Marvell Armada 3700 and by
MediaTek MT7986.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
.../bindings/crypto/inside-secure,safexcel.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Date: 2026-01-08 11:02:34
Not all IP implementations of EIP97 and EIP197 have the EIP and
MEM interrupts hooked up to the SoC, and those are not required
for functionality as status for both can be polled (and anyway
there's even no real need to poll, but that's another story).
As an example of this, the MediaTek MT7968A and MT7986B SoCs do
not have those two interrupts hooked up to their irq controlller.
For this reason, make the EIP and MEM interrupt optional.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
.../devicetree/bindings/crypto/inside-secure,safexcel.yaml | 2 ++
1 file changed, 2 insertions(+)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Date: 2026-01-08 11:02:35
Following the changes in the binding for the SafeXcel crypto
engine, add SoC specific compatibles to the existing nodes in
Armada 37xx and CP11x.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 3 ++-
arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Date: 2026-01-08 11:02:36
Following the changes in the binding for the SafeXcel crypto
engine, add a SoC specific compatible to the existing crypto
node and, while at it, also change the fallback compatible to
inside-secure,safexcel-eip97ies as the eip97 one is deprecated.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On Thu, 08 Jan 2026 12:02:21 +0100, AngeloGioacchino Del Regno wrote:
Add SoC specific compatibles for the SafeXcel crypto engine,
including one for the EIP197B used by Marvell Armada CP110 and
and two for the EIP97IES used by Marvell Armada 3700 and by
MediaTek MT7986.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
.../bindings/crypto/inside-secure,safexcel.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
./Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml:16:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml:19:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml:20:11: [warning] wrong indentation: expected 12 but found 10 (indentation)
dtschema/dtc warnings/errors:
doc reference errors (make refcheckdocs):
See https://patchwork.kernel.org/project/devicetree/patch/20260108110223.20008-3-angelogioacchino.delregno@collabora.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
From: Andrew Lunn <andrew@lunn.ch> Date: 2026-01-08 14:52:44
On Thu, Jan 08, 2026 at 12:02:20PM +0100, AngeloGioacchino Del Regno wrote:
Not all IP implementations of EIP97 and EIP197 have the EIP and
MEM interrupts hooked up to the SoC, and those are not required
for functionality as status for both can be polled (and anyway
there's even no real need to poll, but that's another story).
As an example of this, the MediaTek MT7968A and MT7986B SoCs do
not have those two interrupts hooked up to their irq controlller.
For this reason, make the EIP and MEM interrupt optional.
It seems like the order of these patches is the wrong way around. You
should first add the device specific compatibles, and then update the
constrains based on those compatibles, so that the marvell variants
continue to require 6 interrupts, but the mediatek versions only
require 4.
Andrew