From: Yuanjie Yang <redacted>
Add the PMU node for talos platforms.
Signed-off-by: Yuanjie Yang <redacted>
---
arch/arm64/boot/dts/qcom/talos.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index 95d26e313622..3ba1e3c1d1d7 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -555,6 +555,16 @@ opp-128000000 {
};
};
+ pmu-a55 {
+ compatible = "arm,cortex-a55-pmu";
+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu-a76 {
+ compatible = "arm,cortex-a76-pmu";
+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";--
2.34.1
On 12/17/25 10:20 AM, yuanjie yang wrote:
From: Yuanjie Yang <redacted>
Add the PMU node for talos platforms.
Signed-off-by: Yuanjie Yang <redacted>
---
Check out:
9ce52e908bd5 ("arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions")
2c06e0797c32 ("arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs")
You'll have to do the same since the interrupt is shared
Konrad
quoted hunk
arch/arm64/boot/dts/qcom/talos.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index 95d26e313622..3ba1e3c1d1d7 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -555,6 +555,16 @@ opp-128000000 {
};
};
+ pmu-a55 {
+ compatible = "arm,cortex-a55-pmu";
+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu-a76 {
+ compatible = "arm,cortex-a76-pmu";
+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
On Wed, Dec 17, 2025 at 11:07:17AM +0100, Konrad Dybcio wrote:
On 12/17/25 10:20 AM, yuanjie yang wrote:
quoted
From: Yuanjie Yang <redacted>
Add the PMU node for talos platforms.
Signed-off-by: Yuanjie Yang <redacted>
---
Check out:
9ce52e908bd5 ("arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions")
2c06e0797c32 ("arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs")
You'll have to do the same since the interrupt is shared
Get it, will add interrupt-cells 4 add PPI partitions in next patch.
Thanks,
Yuanjie
Konrad
quoted
arch/arm64/boot/dts/qcom/talos.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index 95d26e313622..3ba1e3c1d1d7 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -555,6 +555,16 @@ opp-128000000 {
};
};
+ pmu-a55 {
+ compatible = "arm,cortex-a55-pmu";
+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu-a76 {
+ compatible = "arm,cortex-a76-pmu";
+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";