From: Joel Stanley <joel@jms.id.au> Date: 2021-08-20 07:47:40
This adds a driver for the LiteX network device, LiteEth.
v2 Addresses feedback from Jakub, with detailed changes in each patch.
It also moves to the litex register accessors so the system works on big
endian litex platforms. I tested with mor1k on an Arty A7-100T.
I have removed the mdio aspects of the driver as they are not needed for
basic operation. I will continue to work on adding support in the
future, but I don't think it needs to block the mac driver going in.
The binding describes the mdio registers, and has been fixed to not show
any warnings against dtschema master.
LiteEth is a simple driver for the FPGA based Ethernet device used in various
RISC-V, PowerPC's microwatt, OpenRISC's mor1k and other FPGA based
systems on chip.
Joel Stanley (2):
dt-bindings: net: Add bindings for LiteETH
net: Add driver for LiteX's LiteETH network interface
.../bindings/net/litex,liteeth.yaml | 79 +++++
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/litex/Kconfig | 27 ++
drivers/net/ethernet/litex/Makefile | 5 +
drivers/net/ethernet/litex/litex_liteeth.c | 327 ++++++++++++++++++
6 files changed, 440 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml
create mode 100644 drivers/net/ethernet/litex/Kconfig
create mode 100644 drivers/net/ethernet/litex/Makefile
create mode 100644 drivers/net/ethernet/litex/litex_liteeth.c
--
2.32.0
From: Joel Stanley <joel@jms.id.au> Date: 2021-08-20 07:47:45
LiteETH is a small footprint and configurable Ethernet core for FPGA
based system on chips.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
v2:
- Fix dtschema check warning relating to registers
- Add names to the registers to make it easier to distinguish which is
what region
- Add mdio description
- Includ ethernet-controller parent description
.../bindings/net/litex,liteeth.yaml | 79 +++++++++++++++++++
1 file changed, 79 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml
@@ -0,0 +1,79 @@+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause+%YAML1.2+---+$id:http://devicetree.org/schemas/net/litex,liteeth.yaml#+$schema:http://devicetree.org/meta-schemas/core.yaml#++title:LiteX LiteETH ethernet device++maintainers:+-Joel Stanley <joel@jms.id.au>++description:|+LiteETH is a small footprint and configurable Ethernet core for FPGA based+system on chips.++The hardware source is Open Source and can be found on at+https://github.com/enjoy-digital/liteeth/.++allOf:+-$ref:ethernet-controller.yaml#++properties:+compatible:+const:litex,liteeth++reg:+minItems:3+items:+-description:MAC registers+-description:MDIO registers+-description:Packet buffer++reg-names:+minItems:3++interrupts:+maxItems:1++rx-fifo-depth:true+tx-fifo-depth:true+mac-address:true+local-mac-address:true+phy-handle:true++mdio:+$ref:mdio.yaml#++required:+-compatible+-reg+-interrupts++additionalProperties:false++examples:+-|+mac:ethernet@8020000 {+compatible = "litex,liteeth";+reg = <0x8021000 0x100>,+<0x8020800 0x100>,+<0x8030000 0x2000>;+reg-names = "mac", "mdio", "buffer";+rx-fifo-depth = <1024>;+tx-fifo-depth = <1024>;+interrupts = <0x11 0x1>;+phy-handle = <ð_phy>;++mdio {+#address-cells = <1>;+#size-cells = <0>;++eth_phy:ethernet-phy@0 {+reg = <0>;+};+};+};+...++# vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml :
From: Joel Stanley <joel@jms.id.au> Date: 2021-08-20 07:48:07
LiteX is a soft system-on-chip that targets FPGAs. LiteEth is a basic
network device that is commonly used in LiteX designs.
The driver was first written in 2017 and has been maintained by the
LiteX community in various trees. Thank you to all who have contributed.
Co-developed-by: Gabriel Somlo <gsomlo@gmail.com>
Co-developed-by: David Shah <redacted>
Co-developed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
v2:
- check for bad len in liteeth_rx before getting skb
- use netdev_alloc_skb_ip_align
- remove unused duplex/speed and mii_bus variables
- set carrier off when stopping device
- increment packet count in the same place as bytes
- fix error return code when irq could not be found
- remove request of mdio base address until it is used
- fix of_property_read line wrapping/alignment
- only check that reader isn't busy, and then send off next packet
- drop phy reset, it was incorrect (wrong address)
- Add an description to the kconfig text
- stop tx queue when busy and re-start after tx complete irq fires
- use litex accessors to support big endian socs
- clean up unused includes
- use standard fifo-depth properties, which are in bytes
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/litex/Kconfig | 27 ++
drivers/net/ethernet/litex/Makefile | 5 +
drivers/net/ethernet/litex/litex_liteeth.c | 327 +++++++++++++++++++++
5 files changed, 361 insertions(+)
create mode 100644 drivers/net/ethernet/litex/Kconfig
create mode 100644 drivers/net/ethernet/litex/Makefile
create mode 100644 drivers/net/ethernet/litex/litex_liteeth.c
From: Andrew Lunn <andrew@lunn.ch> Date: 2021-08-20 17:41:14
On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote:
LiteETH is a small footprint and configurable Ethernet core for FPGA
based system on chips.
Hi Joel
Just an FYI.
DT is considered ABI. Once released, you should not be making changes
which are not backwards compatible.
All the PHY and MDIO properties you are adding here are unused in the
driver. They all look sensible, and you should be able to make it
work. But when you do come to make that implementation, this
definition is the base of what you have to work with.
Andrew
From: Rob Herring <robh@kernel.org> Date: 2021-08-23 18:44:13
On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote:
quoted hunk
LiteETH is a small footprint and configurable Ethernet core for FPGA
based system on chips.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
v2:
- Fix dtschema check warning relating to registers
- Add names to the registers to make it easier to distinguish which is
what region
- Add mdio description
- Includ ethernet-controller parent description
.../bindings/net/litex,liteeth.yaml | 79 +++++++++++++++++++
1 file changed, 79 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml
@@ -0,0 +1,79 @@+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause+%YAML1.2+---+$id:http://devicetree.org/schemas/net/litex,liteeth.yaml#+$schema:http://devicetree.org/meta-schemas/core.yaml#++title:LiteX LiteETH ethernet device++maintainers:+-Joel Stanley <joel@jms.id.au>++description:|+LiteETH is a small footprint and configurable Ethernet core for FPGA based+system on chips.++The hardware source is Open Source and can be found on at+https://github.com/enjoy-digital/liteeth/.++allOf:+-$ref:ethernet-controller.yaml#++properties:+compatible:+const:litex,liteeth++reg:+minItems:3+items:+-description:MAC registers+-description:MDIO registers+-description:Packet buffer++reg-names:+minItems:3
Need to define the names here.
+
+ interrupts:
+ maxItems: 1
+
+ rx-fifo-depth: true
+ tx-fifo-depth: true
Needs a vendor prefix, type, description and constraints.
From: Joel Stanley <joel@jms.id.au> Date: 2021-08-24 03:52:11
On Mon, 23 Aug 2021 at 18:44, Rob Herring [off-list ref] wrote:
On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote:
quoted
+
+ interrupts:
+ maxItems: 1
+
quoted
+ rx-fifo-depth: true
+ tx-fifo-depth: true
Needs a vendor prefix, type, description and constraints.
These are the standard properties from the ethernet-controller.yaml. I
switched the driver to using those once I discovered they existed (v1
defined these in terms of slots, whereas the ethernet-controller
bindings use bytes).
Cheers,
Joel
From: Rob Herring <robh@kernel.org> Date: 2021-08-24 11:52:22
On Mon, Aug 23, 2021 at 10:52 PM Joel Stanley [off-list ref] wrote:
On Mon, 23 Aug 2021 at 18:44, Rob Herring [off-list ref] wrote:
quoted
On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote:
quoted
quoted
+
+ interrupts:
+ maxItems: 1
+
quoted
+ rx-fifo-depth: true
+ tx-fifo-depth: true
Needs a vendor prefix, type, description and constraints.
These are the standard properties from the ethernet-controller.yaml. I
switched the driver to using those once I discovered they existed (v1
defined these in terms of slots, whereas the ethernet-controller
bindings use bytes).
Indeed (grepping the wrong repo didn't work too well :) ).
Still, I'd assume there's some valid range for this h/w you can
define? Or 0 - 2^32 is valid?
Rob
From: "Gabriel L. Somlo" <gsomlo@gmail.com> Date: 2021-08-24 19:43:18
Hi Joel,
Couple of comments below:
On Fri, Aug 20, 2021 at 05:17:26PM +0930, Joel Stanley wrote:
quoted hunk
LiteX is a soft system-on-chip that targets FPGAs. LiteEth is a basic
network device that is commonly used in LiteX designs.
The driver was first written in 2017 and has been maintained by the
LiteX community in various trees. Thank you to all who have contributed.
Co-developed-by: Gabriel Somlo <gsomlo@gmail.com>
Co-developed-by: David Shah <redacted>
Co-developed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
v2:
- check for bad len in liteeth_rx before getting skb
- use netdev_alloc_skb_ip_align
- remove unused duplex/speed and mii_bus variables
- set carrier off when stopping device
- increment packet count in the same place as bytes
- fix error return code when irq could not be found
- remove request of mdio base address until it is used
- fix of_property_read line wrapping/alignment
- only check that reader isn't busy, and then send off next packet
- drop phy reset, it was incorrect (wrong address)
- Add an description to the kconfig text
- stop tx queue when busy and re-start after tx complete irq fires
- use litex accessors to support big endian socs
- clean up unused includes
- use standard fifo-depth properties, which are in bytes
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/litex/Kconfig | 27 ++
drivers/net/ethernet/litex/Makefile | 5 +
drivers/net/ethernet/litex/litex_liteeth.c | 327 +++++++++++++++++++++
5 files changed, 361 insertions(+)
create mode 100644 drivers/net/ethernet/litex/Kconfig
create mode 100644 drivers/net/ethernet/litex/Makefile
create mode 100644 drivers/net/ethernet/litex/litex_liteeth.c
Mostly cosmetic, but should there be a "depends on LITEX" statement in here?
Maybe also "select MII" and "select PHYLIB"?
quoted hunk
+ help
+ If you wish to compile a kernel for hardware with a LiteX LiteEth
+ device then you should answer Y to this.
+
+ LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic
+ network device that is commonly used in LiteX designs.
+
+endif # NET_VENDOR_LITEX
If I set depth to be *equal* to LITEETH_BUFFER_SIZE (2048) in DTS,
no traffic makes it out of my network interface (linux-on-litex-rocket
on an ecpix5 board, see github.com/litex-hub/linux-on-litex-rocket).
May I suggest rejecting if (depth / LITEETH_BUFFER_SIZE < 2) instead?
When that's enforced, the interface actually works fine for me.
At this point, netdev has been dynamically allocated, and should
probably be free'd before liteeth_probe() is allowed to fail,
to avoid any potential leaks...
Something like "err = irq; goto err_free;" maybe?
From: Joel Stanley <joel@jms.id.au> Date: 2021-08-25 03:00:44
On Tue, 24 Aug 2021 at 11:52, Rob Herring [off-list ref] wrote:
On Mon, Aug 23, 2021 at 10:52 PM Joel Stanley [off-list ref] wrote:
quoted
On Mon, 23 Aug 2021 at 18:44, Rob Herring [off-list ref] wrote:
quoted
On Fri, Aug 20, 2021 at 05:17:25PM +0930, Joel Stanley wrote:
quoted
quoted
+
+ interrupts:
+ maxItems: 1
+
quoted
+ rx-fifo-depth: true
+ tx-fifo-depth: true
Needs a vendor prefix, type, description and constraints.
These are the standard properties from the ethernet-controller.yaml. I
switched the driver to using those once I discovered they existed (v1
defined these in terms of slots, whereas the ethernet-controller
bindings use bytes).
Indeed (grepping the wrong repo didn't work too well :) ).
Still, I'd assume there's some valid range for this h/w you can
define? Or 0 - 2^32 is valid?
0 would be problematic, but there's not really any bound on it.
I'll send a v3 with the reg-names documented. Thanks for the review.
Cheers,
Joel
If I set depth to be *equal* to LITEETH_BUFFER_SIZE (2048) in DTS,
no traffic makes it out of my network interface (linux-on-litex-rocket
on an ecpix5 board, see github.com/litex-hub/linux-on-litex-rocket).
May I suggest rejecting if (depth / LITEETH_BUFFER_SIZE < 2) instead?
When that's enforced, the interface actually works fine for me.
Yes, I was using BUFFER_SIZE as the slot size, which it is not. I'll
rework it to use the slot size I think.
I spent some time digging through the migen source and I couldn't work
out where the 1024 length comes from. If anything it should be
eth_mtu, which is 1530.
Florent, can you clear that up?
At this point, netdev has been dynamically allocated, and should
probably be free'd before liteeth_probe() is allowed to fail,
to avoid any potential leaks...
We use the managed variant of alloc_etherdev, which means the
structure is freed by the driver core when the driver is removed. This
saves having to open code the cleanup/free code.
Have a read of Documentation/driver-api/driver-model/devres.rst for
more information.
Thanks for the review Gabriel. I'll send a v3 with some fixes for the
fifo buffer handling.
Cheers,
Joel
If I set depth to be *equal* to LITEETH_BUFFER_SIZE (2048) in DTS,
no traffic makes it out of my network interface (linux-on-litex-rocket
on an ecpix5 board, see github.com/litex-hub/linux-on-litex-rocket).
May I suggest rejecting if (depth / LITEETH_BUFFER_SIZE < 2) instead?
When that's enforced, the interface actually works fine for me.
Yes, I was using BUFFER_SIZE as the slot size, which it is not. I'll
rework it to use the slot size I think.
I spent some time digging through the migen source and I couldn't work
out where the 1024 length comes from. If anything it should be
eth_mtu, which is 1530.
Florent, can you clear that up?
Replying to myself, the 0x800 is the slot size. I will fix the maths
so the number of slots is calculated correctly.
At this point, netdev has been dynamically allocated, and should
probably be free'd before liteeth_probe() is allowed to fail,
to avoid any potential leaks...
We use the managed variant of alloc_etherdev, which means the
structure is freed by the driver core when the driver is removed. This
saves having to open code the cleanup/free code.
Have a read of Documentation/driver-api/driver-model/devres.rst for
more information.
That makes sense, thanks for the link!
Cheers,
--Gabriel