Re: [PATCH 3/6] arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0
From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Date: 2021-06-30 22:48:59
Also in:
linux-arm-kernel, linux-mediatek, lkml
HI, Enric: Enric Balletbo i Serra [off-list ref] 於 2021年6月30日 週三 下午10:47寫道：
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Reset the DSI hardware is needed to prevent different settings between the bootloader and the kernel. Signed-off-by: Enric Balletbo i Serra <redacted> --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 ++ include/dt-bindings/reset/mt8173-resets.h | 2 ++ 2 files changed, 4 insertions(+)diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index e5596fe01a1d..36c3998eb7f1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi@@ -1036,6 +1036,7 @@ mmsys: syscon@14000000 { assigned-clocks = <&topckgen CLK_TOP_MM_SEL>; assigned-clock-rates = <400000000>; #clock-cells = <1>; + #reset-cells = <1>; mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, <&gce 1 CMDQ_THR_PRIO_HIGHEST>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;@@ -1262,6 +1263,7 @@ dsi0: dsi@1401b000 { <&mmsys CLK_MM_DSI0_DIGITAL>, <&mipi_tx0>; clock-names = "engine", "digital", "hs"; + resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>;
Add this in binding document. It would be good if the binding document is in yaml format. Regards, Chun-Kuang.
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phys = <&mipi_tx0>; phy-names = "dphy"; status = "disabled";diff --git a/include/dt-bindings/reset/mt8173-resets.h b/include/dt-bindings/reset/mt8173-resets.h index ba8636eda5ae..6a60c7cecc4c 100644 --- a/include/dt-bindings/reset/mt8173-resets.h +++ b/include/dt-bindings/reset/mt8173-resets.h@@ -27,6 +27,8 @@ #define MT8173_INFRA_GCE_FAXI_RST 40 #define MT8173_INFRA_MMIOMMURST 47 +/* MMSYS resets */ +#define MT8173_MMSYS_SW0_RST_B_DISP_DSI0 25 /* PERICFG resets */ #define MT8173_PERI_UART0_SW_RST 0 --2.30.2