[PATCH 0/2] Add Ethernet DTS for Actions Semi Owl S500 SoCs

This patchset adds the required DTS changes for providing the ethernet
functionality on the Actions S500 SoCs family.

For the moment I have been able to test the Ethernet MAC on the RoseaplePi
SBC only.

Also, please note the patches depend on some clock changes that are
currently under review:
https://lore.kernel.org/lkml/cover.1623354574.git.cristian.ciocaltea@gmail.com/

Thanks,
Cristi

Cristian Ciocaltea (2):
  ARM: dts: owl-s500: Add ethernet support
  ARM: dts: owl-s500-roseapplepi: Add ethernet support

 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 arch/arm/boot/dts/owl-s500.dtsi            | 10 ++++
 2 files changed, 66 insertions(+)

-- 
2.32.0

Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi
SBC. Additionally, provide the necessary properties for the generic S500
ethernet node in order to setup PHY and MDIO.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
index b8c5db2344aa..bffabc7eaa50 100644
--- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts

@@ -225,6 +225,38 @@ bias1-pinconf {
 			bias-pull-down;
 		};
 	};
+
+	ethernet_pins: ethernet-pins {
+		txd01-pinmux {
+			groups = "rmii_txd0_mfp", "rmii_txd1_mfp";
+			function = "eth_rmii";
+		};
+
+		rxd01-pinmux {
+			groups = "rmii_rxd0_mfp", "rmii_rxd1_mfp";
+			function = "eth_rmii";
+		};
+
+		txen_rxer-pinmux {
+			groups = "rmii_txen_mfp", "rmii_rxen_mfp";
+			function = "eth_rmii";
+		};
+
+		crs_dv_ref_clk-pinmux {
+			groups = "rmii_crs_dv_mfp", "rmii_ref_clk_mfp";
+			function = "eth_rmii";
+		};
+
+		ref_clk-pinconf {
+			groups = "rmii_ref_clk_drv";
+			drive-strength = <2>;
+		};
+
+		phy_clk-pinmux {
+			groups = "clko_25m_mfp";
+			function = "clko_25m";
+		};
+	};
 };
 
 /* uSD */

@@ -241,6 +273,30 @@ &mmc0 {
 	vqmmc-supply = <&sd_vcc>;
 };
 
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ethernet_pins>;
+	phy-mode = "rmii";
+	phy-handle = <&eth_phy>;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <150000>;
+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };

-- 
2.32.0

On Fri, Jun 11, 2021 at 12:09:22AM +0300, Cristian Ciocaltea wrote:

Since the function is same, just club all the groups together.

+		};
+
+		ref_clk-pinconf {
+			groups = "rmii_ref_clk_drv";
+			drive-strength = <2>;
+		};
+
+		phy_clk-pinmux {
+			groups = "clko_25m_mfp";
+			function = "clko_25m";
+		};

Move this above node pinconf.

reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes
please run the dtbs_check and try to address the warnings.

Thanks,
Mani

+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };
-- 
2.32.0

On Fri, Jun 11, 2021 at 11:26:06AM +0530, Manivannan Sadhasivam wrote:

On Fri, Jun 11, 2021 at 12:09:22AM +0300, Cristian Ciocaltea wrote:

quoted

Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi
SBC. Additionally, provide the necessary properties for the generic S500
ethernet node in order to setup PHY and MDIO.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
index b8c5db2344aa..bffabc7eaa50 100644
--- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts

@@ -225,6 +225,38 @@ bias1-pinconf {
 			bias-pull-down;
 		};
 	};
+
+	ethernet_pins: ethernet-pins {
+		txd01-pinmux {
+			groups = "rmii_txd0_mfp", "rmii_txd1_mfp";
+			function = "eth_rmii";
+		};
+
+		rxd01-pinmux {
+			groups = "rmii_rxd0_mfp", "rmii_rxd1_mfp";
+			function = "eth_rmii";
+		};
+
+		txen_rxer-pinmux {
+			groups = "rmii_txen_mfp", "rmii_rxen_mfp";
+			function = "eth_rmii";
+		};
+
+		crs_dv_ref_clk-pinmux {
+			groups = "rmii_crs_dv_mfp", "rmii_ref_clk_mfp";
+			function = "eth_rmii";

Since the function is same, just club all the groups together.

Sure.

quoted

+		};
+
+		ref_clk-pinconf {
+			groups = "rmii_ref_clk_drv";
+			drive-strength = <2>;
+		};
+
+		phy_clk-pinmux {
+			groups = "clko_25m_mfp";
+			function = "clko_25m";
+		};

Move this above node pinconf.

Ok.

quoted

+	};
 };
 
 /* uSD */

@@ -241,6 +273,30 @@ &mmc0 {
 	vqmmc-supply = <&sd_vcc>;
 };
 
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ethernet_pins>;
+	phy-mode = "rmii";
+	phy-handle = <&eth_phy>;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <150000>;

reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes
please run the dtbs_check and try to address the warnings.

The properties are those described in Documentation/devicetree/bindings/net/mdio.yaml
The dtbs_check doesn't report any issues in my case, usually this
happens when dtschema is not updated to the latest version. I always
run the following command after rebasing to a new kernel version:

  pip3 install --upgrade dtschema

Thanks for the review,
Cristi

Thanks,
Mani

quoted

+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };
-- 
2.32.0

On Fri, Jun 11, 2021 at 09:31:47AM +0300, Cristian Ciocaltea wrote:

On Fri, Jun 11, 2021 at 11:26:06AM +0530, Manivannan Sadhasivam wrote:

quoted

On Fri, Jun 11, 2021 at 12:09:22AM +0300, Cristian Ciocaltea wrote:

quoted

Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi
SBC. Additionally, provide the necessary properties for the generic S500
ethernet node in order to setup PHY and MDIO.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
index b8c5db2344aa..bffabc7eaa50 100644
--- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts

[...]

quoted

quoted

+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <150000>;

reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes
please run the dtbs_check and try to address the warnings.

The properties are those described in Documentation/devicetree/bindings/net/mdio.yaml

Do you mean the reset properties are applicable for all PHYs in this SoC?

The dtbs_check doesn't report any issues in my case, usually this
happens when dtschema is not updated to the latest version. I always
run the following command after rebasing to a new kernel version:

  pip3 install --upgrade dtschema

That's good!

Thanks,
Mani

Thanks for the review,
Cristi

quoted

Thanks,
Mani

quoted

+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };
-- 
2.32.0

On Fri, Jun 11, 2021 at 12:09:40PM +0530, Manivannan Sadhasivam wrote:

On Fri, Jun 11, 2021 at 09:31:47AM +0300, Cristian Ciocaltea wrote:

quoted

On Fri, Jun 11, 2021 at 11:26:06AM +0530, Manivannan Sadhasivam wrote:

quoted

On Fri, Jun 11, 2021 at 12:09:22AM +0300, Cristian Ciocaltea wrote:

quoted

Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi
SBC. Additionally, provide the necessary properties for the generic S500
ethernet node in order to setup PHY and MDIO.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
index b8c5db2344aa..bffabc7eaa50 100644
--- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts

[...]

quoted

quoted

quoted

+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <150000>;

reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes
please run the dtbs_check and try to address the warnings.

The properties are those described in Documentation/devicetree/bindings/net/mdio.yaml

Do you mean the reset properties are applicable for all PHYs in this SoC?

Actually there is only one PHY connected. I've also checked the vendor
code and didn't notice any special handling for the PHY reset.

quoted

The dtbs_check doesn't report any issues in my case, usually this
happens when dtschema is not updated to the latest version. I always
run the following command after rebasing to a new kernel version:

  pip3 install --upgrade dtschema

That's good!

Thanks,
Mani

quoted

Thanks for the review,
Cristi

quoted

Thanks,
Mani

quoted

+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };
-- 
2.32.0

Add Ethernet MAC device tree node for Actions Semi S500 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 arch/arm/boot/dts/owl-s500.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index cd635f222d26..739b4b9cec8c 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi

@@ -324,5 +324,15 @@ mmc2: mmc@b0238000 {
 			dma-names = "mmc";
 			status = "disabled";
 		};
+
+		ethernet: ethernet@b0310000 {
+			compatible = "actions,s500-emac", "actions,owl-emac";
+			reg = <0xb0310000 0x10000>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_ETHERNET>, <&cmu CLK_RMII_REF>;
+			clock-names = "eth", "rmii";
+			resets = <&cmu RESET_ETHERNET>;
+			status = "disabled";
+		};
 	};
 };

-- 
2.32.0

On Fri, Jun 11, 2021 at 12:09:21AM +0300, Cristian Ciocaltea wrote:

Add Ethernet MAC device tree node for Actions Semi S500 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>

Reviewed-by: Manivannan Sadhasivam <redacted>

Thanks,
Mani