[PATCH 2/2] cpuidle: qcom: Add SPM register data for APQ8026 and MSM8226
From: Bartosz Dudziak <hidden>
Date: 2021-05-13 15:02:42
Also in:
linux-arm-msm, linux-pm, lkml
Subsystem:
arm/qualcomm mailing list, cpu idle time management framework, the rest · Maintainers:
"Rafael J. Wysocki", Daniel Lezcano, Linus Torvalds
Add APQ8026 and MSM8226 SoCs register data to SPM AVS Wrapper 2 (SAW2) power controller driver. Signed-off-by: Bartosz Dudziak <redacted> --- drivers/cpuidle/cpuidle-qcom-spm.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c
index adf91a6e4d..9711a98d68 100644
--- a/drivers/cpuidle/cpuidle-qcom-spm.c
+++ b/drivers/cpuidle/cpuidle-qcom-spm.c@@ -87,6 +87,18 @@ static const struct spm_reg_data spm_reg_8974_8084_cpu = { .start_index[PM_SLEEP_MODE_SPC] = 3, }; +/* SPM register data for 8026, 8226 */ +static const struct spm_reg_data spm_reg_8x26_cpu = { + .reg_offset = spm_reg_offset_v2_1, + .spm_cfg = 0x0, + .spm_dly = 0x3C102800, + .seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90, + 0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B, + 0x80, 0x10, 0x26, 0x30, 0x0F }, + .start_index[PM_SLEEP_MODE_STBY] = 0, + .start_index[PM_SLEEP_MODE_SPC] = 5, +}; + static const u8 spm_reg_offset_v1_1[SPM_REG_NR] = { [SPM_REG_CFG] = 0x08, [SPM_REG_SPM_CTL] = 0x20,
@@ -259,6 +271,10 @@ static struct spm_driver_data *spm_get_drv(struct platform_device *pdev, } static const struct of_device_id spm_match_table[] = { + { .compatible = "qcom,apq8026-saw2-v2.1-cpu", + .data = &spm_reg_8x26_cpu }, + { .compatible = "qcom,msm8226-saw2-v2.1-cpu", + .data = &spm_reg_8x26_cpu }, { .compatible = "qcom,msm8974-saw2-v2.1-cpu", .data = &spm_reg_8974_8084_cpu }, { .compatible = "qcom,apq8084-saw2-v2.1-cpu",
--
2.25.1