[PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin

Subsystems: arm/freescale imx / mxc / layerscape arm architecture, the rest

STALE2034d

5 messages, 4 authors, 2021-02-11 · open the first message on its own page

[PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin

From: Claudius Heine <hidden>
Date: 2021-02-11 10:03:24

There is a 0 missing in the pad register offset. This patch adds it.

Signed-off-by: Claudius Heine <redacted>
---
 arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index 5ccc4cc91959d..a003e6af33533 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h

@@ -124,7 +124,7 @@
 #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                                     0x0A4 0x30C 0x000 0x0 0x0
 #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1                                      0x0A4 0x30C 0x000 0x5 0x0
 #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0                                 0x0A8 0x310 0x000 0x0 0x0
-#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x31  0x000 0x5 0x0
+#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x310 0x000 0x5 0x0
 #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1                                 0x0AC 0x314 0x000 0x0 0x0
 #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3                                    0x0AC 0x314 0x000 0x5 0x0
 #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2                                 0x0B0 0x318 0x000 0x0 0x0

-- 
2.30.0

Re: [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin

From: Claudius Heine <hidden>
Date: 2021-02-11 10:16:51

Hi,

can you please add:

Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")

to the commit message.

regards,
Claudius

On 2021-02-11 10:54, Claudius Heine wrote:

quoted hunk

There is a 0 missing in the pad register offset. This patch adds it.

Signed-off-by: Claudius Heine <redacted>
---
  arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index 5ccc4cc91959d..a003e6af33533 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h

@@ -124,7 +124,7 @@
  #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                                     0x0A4 0x30C 0x000 0x0 0x0
  #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1                                      0x0A4 0x30C 0x000 0x5 0x0
  #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0                                 0x0A8 0x310 0x000 0x0 0x0
-#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x31  0x000 0x5 0x0
+#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x310 0x000 0x5 0x0
  #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1                                 0x0AC 0x314 0x000 0x0 0x0
  #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3                                    0x0AC 0x314 0x000 0x5 0x0
  #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2                                 0x0B0 0x318 0x000 0x0 0x0

Re: [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin

From: Frieder Schrempf <hidden>
Date: 2021-02-11 10:19:57

On 11.02.21 10:54, Claudius Heine wrote:

There is a 0 missing in the pad register offset. This patch adds it.

Signed-off-by: Claudius Heine <redacted>

I think this should rather be prefixed by "arm64: dts: imx8mm:" as this 
is no change in the pinctrl driver, but only in the devicetree.

And I guess this deserves a "Fixes" and "Cc: stable" tag, so:

Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")
Cc: stable@vger.kernel.org
Reviewed-by: Frieder Schrempf <redacted>

quoted hunk

---
  arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index 5ccc4cc91959d..a003e6af33533 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h

@@ -124,7 +124,7 @@
  #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                                     0x0A4 0x30C 0x000 0x0 0x0
  #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1                                      0x0A4 0x30C 0x000 0x5 0x0
  #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0                                 0x0A8 0x310 0x000 0x0 0x0
-#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x31  0x000 0x5 0x0
+#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2                                    0x0A8 0x310 0x000 0x5 0x0
  #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1                                 0x0AC 0x314 0x000 0x0 0x0
  #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3                                    0x0AC 0x314 0x000 0x5 0x0
  #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2                                 0x0B0 0x318 0x000 0x0 0x0

Re: [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin

From: Fabio Estevam <festevam@gmail.com>
Date: 2021-02-11 10:20:31

Hi Claudius,

On Thu, Feb 11, 2021 at 7:15 AM Claudius Heine [off-list ref] wrote:

Hi,

can you please add:

Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")

Yes, I was about to suggest the same. Thanks for the fix:

Reviewed-by: Fabio Estevam <festevam@gmail.com>

Re: [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin

From: Marek Vasut <marex@denx.de>
Date: 2021-02-11 11:48:36

On 2/11/21 11:17 AM, Frieder Schrempf wrote:

On 11.02.21 10:54, Claudius Heine wrote:

quoted

There is a 0 missing in the pad register offset. This patch adds it.

Signed-off-by: Claudius Heine <redacted>

I think this should rather be prefixed by "arm64: dts: imx8mm:" as this 
is no change in the pinctrl driver, but only in the devicetree.

And I guess this deserves a "Fixes" and "Cc: stable" tag, so:

Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for 
imx8mm")
Cc: stable@vger.kernel.org
Reviewed-by: Frieder Schrempf <redacted>

Indeed.

But since this isn't the first such fix, I wonder whether it wouldn't be 
a good idea to regenerate those pinctrl tables and see whether there are 
any other such issues in them. I wonder, is there some sort of register 
and bit list in machine-parseable form for the MX8M ?

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