[PATCH V1] arm64: dts: qcom: sc7180: Include xo clock to sdhc clocks list
From: Shaik Sajida Bhanu <hidden>
Date: 2020-07-21 10:48:49
Also in:
linux-arm-msm, linux-mmc, lkml
Subsystem:
arm/qualcomm chromebook support, arm/qualcomm mailing list, arm/qualcomm support, the rest · Maintainers:
Bjorn Andersson, Konrad Dybcio, Linus Torvalds
From: Veerabhadrarao Badiganti <redacted> Include xo clock to sdhc clocks list which will be used in calculating MCLK_FREQ field of DLL_CONFIG2 register. Signed-off-by: Veerabhadrarao Badiganti <redacted> Signed-off-by: Shaik Sajida Bhanu <redacted> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index d78a066..7ccb780 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi@@ -682,8 +682,9 @@ interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC1_APPS_CLK>, - <&gcc GCC_SDCC1_AHB_CLK>; - clock-names = "core", "iface"; + <&gcc GCC_SDCC1_AHB_CLK>, + <&xo_board>; + clock-names = "core", "iface", "xo"; interconnects = <&aggre1_noc MASTER_EMMC &mc_virt SLAVE_EBI1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_EMMC_CFG>; interconnect-names = "sdhc-ddr","cpu-sdhc";
@@ -2481,8 +2482,9 @@ interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC2_APPS_CLK>, - <&gcc GCC_SDCC2_AHB_CLK>; - clock-names = "core", "iface"; + <&gcc GCC_SDCC2_AHB_CLK>, + <&xo_board>; + clock-names = "core", "iface", "xo"; interconnects = <&aggre1_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
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