[PATCH] arm64: dts: stratix10: add USB ECC reset bit
From: Dinh Nguyen <hidden>
Date: 2017-12-13 14:14:31
Subsystem:
arm/socfpga architecture, the rest · Maintainers:
Dinh Nguyen, Linus Torvalds
The USB IP on the Stratix10 SoC needs the USB OCP(ecc) bit to get de-asserted as well for the USB IP to work properly. Signed-off-by: Dinh Nguyen <redacted> --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 11ce068..7366a58 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi@@ -327,8 +327,8 @@ compatible = "snps,dwc2"; reg = <0xffb00000 0x40000>; interrupts = <0 93 4>; - resets = <&rst USB0_RESET>; - reset-names = "dwc2"; + resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; + reset-names = "dwc2", "dwc2-ecc"; status = "disabled"; };
@@ -336,8 +336,8 @@ compatible = "snps,dwc2"; reg = <0xffb40000 0x40000>; interrupts = <0 94 4>; - resets = <&rst USB1_RESET>; - reset-names = "dwc2"; + resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>; + reset-names = "dwc2", "dwc2-ecc"; status = "disabled"; };
--
2.7.4
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