# Re: \[PATCH v3 01/14\] Documentation: dt/bindings: Document pinctrl-ingenic

- From: Paul Cercueil \<paul@crapouillou.net\>
- Date: 2017-02-21 11:20:24 
- List: linux-devicetree
- Page: https://ratatoskr.run/linux-devicetree/2017/02/4938830
- Thread: https://ratatoskr.run/linux-gpio/2017/01/4914584/t/2.md

```text
Le 2017-02-20 14:56, Linus Walleij a écrit :
> On Thu, Feb 9, 2017 at 6:28 PM, Paul Cercueil [ref] wrote:
>
>> I was thinking that instead of having one pinctrl-ingenic instance covering
>> 0x600 of register space, and 6 instances of gpio-ingenic having 0x100 each,
>> I could just have 6 instances of pinctrl-ingenic, each one with an instance
>> of gpio-ingenic declared as a sub-node, each handling just 0x100 of memory
>> space.
>
> My head is spinning,  but I think I get it. What is wrong with the solution
> I proposed with one pin control instance covering the whole 0x600 and with 6
> subnodes of GPIO?
>
> The GPIO nodes do not even have to have an address range associated with
> them you know, that can be distributed out with regmap code accessing
> the parent regmap.

OK, but then each GPIO chip 'X' still need to know its offset in the register
area, which is (pinctrl_base + X * 0x100).
What's the best way to pass that info to the driver? (I assume it's not with
a custom DT binding...).

Regards,
-Paul
```