[PATCH v2] ARM: OMAP2+: gpmc: enable wait-pin monitoring for NAND devices via DT
From: Pekon Gupta <hidden>
Date: 2014-05-20 06:24:24
Also in:
linux-omap
Subsystem:
arm port, memory technology devices (mtd), omap general purpose memory controller support, omap power management support, omap2+ support, open firmware and flattened device tree bindings, the rest · Maintainers:
Russell King, Miquel Raynal, Richard Weinberger, Vignesh Raghavendra, Roger Quadros, Tony Lindgren, Kevin Hilman, Aaro Koskinen, Andreas Kemnade, Kevin Hilman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
This patch enables 'wait-pin' monitoring in NAND driver if following properties are present under NAND DT node gpmc,wait-pin = <wait-pin number> gpmc,wait-on-read gpmc,wait-on-write As NAND generic framework uses common path nand_chip->dev_ready() for monitoring completion of Read and Write status, so wait-pin monitoring is enabled only when *both* 'gpmc,wait-on-read' and 'gpmc,wait-on-write' are specified. CC: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Signed-off-by: Pekon Gupta <redacted> --- Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 8 ++++++++ arch/arm/mach-omap2/gpmc-nand.c | 8 +++++--- 2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index eb81435..4039032 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt@@ -45,6 +45,14 @@ Optional properties: ELM hardware engines should specify this device node in .dtsi Using ELM for ECC error correction frees some CPU cycles. + - gpmc,wait-pin=<pin number> Specifies GPMC wait-pin number to monitor + - gpmc,wait-on-read Enable wait-pin monitoring for Read accesses + - gpmc,wait-on-write Enable wait-pin monitoring for Write accesses + As NAND generic framework uses single common function + nand_chip->dev_ready() for polling wait-pin both for Read and + Write accesses. So for NAND devices both 'gpmc,wait-on-read' and + 'gpmc,wait-on-write' need to be specified together. + For inline partiton table parsing (optional): - #address-cells: should be set to 1
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 17cd393..62bc3de 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c@@ -123,11 +123,13 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, } } - if (gpmc_nand_data->of_node) + if (gpmc_nand_data->of_node) { gpmc_read_settings_dt(gpmc_nand_data->of_node, &s); - else + if (s.wait_on_read && s.wait_on_write) + gpmc_nand_data->dev_ready = true; + } else { gpmc_set_legacy(gpmc_nand_data, &s); - + } s.device_nand = true; err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);
--
1.8.5.1.163.gd7aced9
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