Re: [PATCH v2 01/12] ARM: Orion: DT support for IRQ and GPIO Controllers

2 messages, 2 authors, 2012-07-05 · open the first message on its own page

Re: [PATCH v2 01/12] ARM: Orion: DT support for IRQ and GPIO Controllers

From: Thomas Petazzoni <hidden>
Date: 2012-07-05 11:42:31

Le Thu, 05 Jul 2012 12:38:51 +0200,
Arnaud Patard (Rtp) [off-list ref] a écrit :
quoted
The MPP registers are identical on Armada XP/370 and 88F6281 (not sure
which other SoC datasheet I should be checking). Basically, it's just a
range of contiguous registers, with 4 bits per pin to select the
function.
iirc, other SoCs are similar. The small exception being dove I
guess. Dove has a 3rd gpo [the gpios are output only] bank but to be
used as gpio require that a special bit is set and it's for all gpios of
this bank. You'll find this bit in the "general mpp configuration
register" if you look at the datasheet.
Ok, this is a bit trickier, but we can probably do something for it as
well.
quoted
So my pinmux driver should simply work as is for Orion as well. The
only difference between platforms is the number of MPP pins that are
available, but this number also varies between versions of Armada XP
and Armada 370, so I already support this in the driver.
Are there some output-only gpio on armada xp/370 like on kirkwood/dove ?
Yes. I am not sure yet how to describe those in the DT, or even if it
is actually useful to describe them. Wouldn't it be simpler to just
leave to the user of the GPIO to use a GPIO that's appropriate for its
usage, i.e not use a GPO when input is needed?

Best regards,

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v2 01/12] ARM: Orion: DT support for IRQ and GPIO Controllers

From: Andrew Lunn <hidden>
Date: 2012-07-05 11:48:15

Hi Thomas
Yes. I am not sure yet how to describe those in the DT, or even if it
is actually useful to describe them. Wouldn't it be simpler to just
leave to the user of the GPIO to use a GPIO that's appropriate for its
usage, i.e not use a GPO when input is needed?
We assume the hardware designer has got the basic hardware right. Its
not going to work otherwise.

What we are trying to detect is a DT author making a typo, assigning a
gpio-key to a GPO pin, for example. The current MPP scheme will detect
this sort of error and issue a warning to the kernel logs.

	 Andrew
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