Re: [PATCH] ARM: dts: aspeed: yosemite5: add x4 E1.S expansion board I2C mux
From: Andrew Jeffery <andrew@codeconstruct.com.au>
Date: 2026-01-08 04:46:23
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On Mon, 2025-12-22 at 19:25 +0800, Kevin Tung wrote:
The new hardware design adds two additional E1.S devices behind an I2C mux at address 0x73 on bus 10. Add support for this mux in the DTS device tree.
Out of curiosity, you're monitoring them with the NVMe-MI basic management command and not NVMe-MI over MCTP, or is there something else going on which motivates describing empty mux legs? Andrew