[PATCH v3 1/6] dt-bindings: gpio: aspeed,ast2400-gpio: Support ast2700

[PATCH v3 0/6] Add Aspeed G7 gpio support · Billy Tsai <hidden> · 2024-09-13
[PATCH v3 1/6] dt-bindings: gpio: aspeed,ast2400-gpio: Support ast2700 · Billy Tsai <hidden> · 2024-09-13
Re: [PATCH v3 1/6] dt-bindings: gpio: aspeed,ast2400-gpio: Support ast2700 · Conor Dooley <conor@kernel.org> · 2024-09-13
[PATCH v3 2/6] gpio: aspeed: Remove the name for bank array · Billy Tsai <hidden> · 2024-09-13
Re: [PATCH v3 2/6] gpio: aspeed: Remove the name for bank array · Andrew Jeffery <andrew@codeconstruct.com.au> · 2024-09-16
[PATCH v3 3/6] gpio: aspeed: Create llops to handle hardware access · Billy Tsai <hidden> · 2024-09-13
Re: [PATCH v3 3/6] gpio: aspeed: Create llops to handle hardware access · Andrew Jeffery <andrew@codeconstruct.com.au> · 2024-09-16
Re: [PATCH v3 3/6] gpio: aspeed: Create llops to handle hardware access · Andrew Jeffery <andrew@codeconstruct.com.au> · 2024-09-16
Re: [PATCH v3 3/6] gpio: aspeed: Create llops to handle hardware access · Billy Tsai <hidden> · 2024-09-19
[PATCH v3 4/6] gpio: aspeed: Support G7 Aspeed gpio controller · Billy Tsai <hidden> · 2024-09-13
[PATCH v3 5/6] gpio: aspeed: Change the macro to support deferred probe · Billy Tsai <hidden> · 2024-09-13
Re: [PATCH v3 5/6] gpio: aspeed: Change the macro to support deferred probe · kernel test robot <hidden> · 2024-09-14
Re: [PATCH v3 5/6] gpio: aspeed: Change the macro to support deferred probe · kernel test robot <hidden> · 2024-09-14
[PATCH v3 6/6] gpio: aspeed: Add the flush write to ensure the write complete. · Billy Tsai <hidden> · 2024-09-13
Re: [PATCH v3 6/6] gpio: aspeed: Add the flush write to ensure the write complete. · Andrew Jeffery <andrew@codeconstruct.com.au> · 2024-09-16
Re: [PATCH v3 6/6] gpio: aspeed: Add the flush write to ensure the write complete. · Billy Tsai <hidden> · 2024-09-19

From: Conor Dooley <conor@kernel.org>
Date: 2024-09-13 18:22:48
Also in: linux-arm-kernel, linux-devicetree, linux-gpio, lkml

On Fri, Sep 13, 2024 at 03:43:20PM +0800, Billy Tsai wrote:

The AST2700 is the 7th generation SoC from Aspeed, featuring two GPIO
controllers: one with 12 GPIO pins and another with 216 GPIO pins.

Signed-off-by: Billy Tsai <redacted>

Acked-by: Conor Dooley <conor.dooley@microchip.com>
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