Inter-revision diff: cover letter

Comparing v2 (message) to v6 (message)

--- v2
+++ v6
@@ -2,14 +2,31 @@
 handled via a separate interrupt ID and managed via a triplet of
 dedicated registers hosted by the SoC.
 
-Implement an interrupt driver for those IRQs then add IRQs capability to
-the QUICC ENGINE GPIOs.
+Implement an interrupt driver for those IRQs then add change
+notification capability to the QUICC ENGINE GPIOs.
 
 The number of GPIOs for which interrupts are supported depends on
 the microcontroller:
 - mpc8323 has 10 GPIOS supporting interrupts
 - mpc8360 has 28 GPIOS supporting interrupts
 - mpc8568 has 18 GPIOS supporting interrupts
+
+Changes in v6:
+- Changed mask local var to unsigned long instead of u32 to avoid build failure on 64 bits (patch 4)
+- Comments from Rob taken into account except the comment on fsl,<chip>-qe-pario-bank becoming fsl,chip-qe-pario-bank as I don't know what to do.
+
+Changes in v5:
+- Replaced new DT property "fsl,qe-gpio-irq-mask" by a mask encoded
+in the of_device_id table
+- Converted QE QPIO DT bindings to DT schema
+
+Changes in v4:
+- Removed unused headers
+- Using device_property_read_u32() instead of of_property_read_u32()
+
+Changes in v3:
+- Splited dt-bindings update out of patch "soc: fsl: qe: Add support of IRQ in QE GPIO"
+- Reordered DTS node exemples iaw dts-coding-style.rst
 
 Changes in v2:
 - Fixed warning on PPC64 build (Patch 1)
@@ -18,21 +35,25 @@
 - Added fsl,qe-gpio-irq-mask propertie in DT binding doc (Patch 4)
 - Fixed problems reported by 'make dt_binding_check' (Patch 5)
 
-Christophe Leroy (5):
+Christophe Leroy (7):
   soc: fsl: qe: Add an interrupt controller for QUICC Engine Ports
   soc: fsl: qe: Change GPIO driver to a proper platform driver
   soc: fsl: qe: Drop legacy-of-mm-gpiochip.h header from GPIO driver
   soc: fsl: qe: Add support of IRQ in QE GPIO
   dt-bindings: soc: fsl: qe: Add an interrupt controller for QUICC
     Engine Ports
+  dt-bindings: soc: fsl: qe: Convert QE GPIO to DT schema
+  dt-bindings: soc: fsl: qe: Add support of IRQ in QE GPIO
 
- .../soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml       |  58 +++++++
- .../bindings/soc/fsl/cpm_qe/qe/par_io.txt     |  19 +++
+ .../gpio/fsl,mpc8323-qe-pario-bank.yaml       |  72 ++++++
+ .../soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml       |  58 +++++
+ .../bindings/soc/fsl/cpm_qe/qe/par_io.txt     |  26 +--
  arch/powerpc/platforms/Kconfig                |   1 -
  drivers/soc/fsl/qe/Makefile                   |   2 +-
- drivers/soc/fsl/qe/gpio.c                     | 145 +++++++++-------
- drivers/soc/fsl/qe/qe_ports_ic.c              | 156 ++++++++++++++++++
- 6 files changed, 322 insertions(+), 59 deletions(-)
+ drivers/soc/fsl/qe/gpio.c                     | 209 ++++++++++++------
+ drivers/soc/fsl/qe/qe_ports_ic.c              | 156 +++++++++++++
+ 7 files changed, 434 insertions(+), 90 deletions(-)
+ create mode 100644 Documentation/devicetree/bindings/gpio/fsl,mpc8323-qe-pario-bank.yaml
  create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml
  create mode 100644 drivers/soc/fsl/qe/qe_ports_ic.c
 
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