--- v2
+++ v4
@@ -10,25 +10,21 @@
Signed-off-by: Stefan Dösinger <stefandoesinger@gmail.com>
---
- Documentation/arch/arm/zte/zx297520v3.rst | 106 ++++++++++++++++++++++
+ Documentation/arch/arm/zte/zx297520v3.rst | 158 ++++++++++++++++++++++++++++++
MAINTAINERS | 4 +
arch/arm/Kconfig | 2 +
arch/arm/Makefile | 1 +
- arch/arm/mach-zte/Kconfig | 23 +++++
+ arch/arm/mach-zte/Kconfig | 24 +++++
arch/arm/mach-zte/Makefile | 2 +
arch/arm/mach-zte/zx297520v3.c | 19 ++++
- 7 files changed, 157 insertions(+)
- create mode 100644 Documentation/arch/arm/zte/zx297520v3.rst
- create mode 100644 arch/arm/mach-zte/Kconfig
- create mode 100644 arch/arm/mach-zte/Makefile
- create mode 100644 arch/arm/mach-zte/zx297520v3.c
+ 7 files changed, 210 insertions(+)
diff --git a/Documentation/arch/arm/zte/zx297520v3.rst b/Documentation/arch/arm/zte/zx297520v3.rst
new file mode 100644
-index 000000000000..cfa40ca6baaf
+index 000000000000..a0f25ade0a3d
--- /dev/null
+++ b/Documentation/arch/arm/zte/zx297520v3.rst
-@@ -0,0 +1,106 @@
+@@ -0,0 +1,158 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+====================================
@@ -51,21 +47,76 @@
+MiFis and stationary CPEs. In addition to the CPU these devices usually have
+64 MB Ram (although some is shared with the LTE chip), 128 MB NAND flash, an
+SDIO connected RTL8192-type Wifi chip limited to 2.4 ghz operation, USB 2,
-+and buttons.
-+
-+Some devices, especially the stationary ones, have 100 mbit Ethernet, and an
++and buttons. Devices with as low as 32 MB or as high as 128 MB ram exist, as
++do devices with 8 or 16 MB of NOR flash.
++
++Some devices, especially the stationary ones, have 100 mbit Ethernet and an
+Ethernet switch.
+
-+Usually the devices have LEDs for status indication, although some have SPI-
-+connected displays.
++Usually the devices have LEDs for status indication, although some have SPI or
++i2c connected displays
+
+Some have an SD card slot. If it exists, it is a better choice for the root
+file system because it easily outperforms the built-in NAND.
+
-+The LTE interface appears to be run by a separate Cortex-M0 CPU that runs a
-+non-Linux binary blob and communicates with the main CPU via RPMsg.
-+
-+2. Booting
++The LTE interface runs on a separate DSP called ZSP880. It is probably derived
++from LSI ZSPs and has an undocumented instruction set. The ZSP communicates
++with the main CPU via SRAM and DRAM and a mailbox hardware that can generate
++IRQs on either ends.
++
++There is also a Cortex M0 CPU, which is responsible for early HW initialization
++and starting the Cortex A53 CPU. It does not have any essential purpose once
++U-Boot is started. A SRAM-Based handover protocol exists to run custom code on
++this CPU.
++
++2. Booting via USB
++---------------------------
++
++The Boot ROM has support for booting custom code via USB. This mode can be
++entered by connecting a Boot PIN to GND or by modifying the third byte on NAND
++(set it to anything other than 0x5A aka 'Z'). A free software tool to start
++custom uboot and kernels can be found here:
++
++https://github.com/zx297520v3-mainline/zx297520v3-loader
++
++If USB download mode is entered but no boot commands are sent through USB, the
++device will proceed to boot normally after a few seconds. It is therefore
++possible to enable USB boot permanently and still leave the default boot files
++in place.
++
++3. Building for built-in U-Boot
++---------------------------
++The devices come with an ancient U-Boot that loads legacy uImages from NAND and
++boots them without a chance for the user to interrupt. The images are stored in
++files ap_cpuap.bin and ap_recovery.bin on a jffs2 partition named imagefs,
++usually mtd4. A file named "fotaflag" switches between the two modes.
++
++In addition to the uImage header, those files have a 384 byte signature header,
++which is used for authenticating the images on some devices. Most devices have
++this authentication disabled and it is enough to pad the uImage files with 384
++zero bytes.
++
++Builtin U-Boot also poorly sets up the CPU. Read the next section for details
++on this. It has no support for loading DTBs, so CONFIG_ARM_APPENDED_DTB is
++needed.
++
++So to build an image that boots from NAND the following steps are necessary:
++
++1) Patch the assembly code from section 3 into arch/arm/kernel/head.S.
++2) make zx29_defconfig
++3) make [-j x]
++4) cat arch/arm/boot/zImage arch/arm/boot/dts/zte/[device].dtb > kernel+dtb
++5) mkimage -A arm -O linux -T kernel -C none -a 0x20008000 -d kernel+dtb uimg
++6) dd if=/dev/zero bs=1 count=384 of=ap_recovery.bin
++7) cat uimg >> ap_recovery.bin
++8) Place this file onto imagefs on the device. Delete ap_cpuap.bin if the
++free space is not enough.
++9) Create the file fotaflag: echo -n FOTA-RECOVERY > fotaflag
++
++For development, booting ap_recovery.bin is recommended because the normal boot
++mode arms the watchdog before starting the kernel.
++
++4. CPU and GIC Setup
+---------------------------
+
+Generally CPU and GICv3 need to be set up according to the requirements spelled
@@ -75,8 +126,6 @@
+2. Enable access to ICC_SRE
+3. Disable trapping IRQs into monitor mode
+4. Configure EL2 and below to run in insecure mode.
-+
-+And an unrelated: This needs to be moved into a driver eventually:
+5. Configure timer PPIs to active-low.
+
+The kernel sources provided by ZTE do not boot either (interrupts do not work
@@ -103,7 +152,6 @@
+@ Raspberry pi's armstub7.S here.
+@
+@ ARM docs say modify this bit in monitor mode only...
-+mrc p15, 0, r3, c1, c1, 0
+mov r3, #0x131 @ non-secure, Make F, A bits in CPSR writeable
+ @ Allow hypervisor call.
+mcr p15, 0, r3, c1, c1, 0
@@ -136,25 +184,25 @@
+cps #SVC_MODE
+```
diff --git a/MAINTAINERS b/MAINTAINERS
-index e8f06145fb54..225392cf3b5b 100644
+index d1cc0e12fe1f..974d7a98956a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -28392,6 +28392,10 @@ F: lib/zstd/
- N: zstd
- K: zstd
+@@ -29200,6 +29200,10 @@ F: include/linux/zswap.h
+ F: mm/zswap.c
+ F: tools/testing/selftests/cgroup/test_zswap.c
+ZX29
+M: Stefan Dösinger <stefandoesinger@gmail.com>
+F: arch/arm/mach-zte/
+
- ZSWAP COMPRESSED SWAP CACHING
- M: Johannes Weiner <hannes@cmpxchg.org>
- M: Yosry Ahmed <yosry.ahmed@linux.dev>
+ SENARYTECH AUDIO CODEC DRIVER
+ M: bo liu <bo.liu@senarytech.com>
+ S: Maintained
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 4fb985b76e97..bd2cae242603 100644
+index ec33376f8e2b..4217ed704e48 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -463,6 +463,8 @@ source "arch/arm/mach-versatile/Kconfig"
+@@ -464,6 +464,8 @@ source "arch/arm/mach-versatile/Kconfig"
source "arch/arm/mach-vt8500/Kconfig"
@@ -177,16 +225,16 @@
machine-$(CONFIG_PLAT_SPEAR) += spear
diff --git a/arch/arm/mach-zte/Kconfig b/arch/arm/mach-zte/Kconfig
new file mode 100644
-index 000000000000..373889b72005
+index 000000000000..24699256863b
--- /dev/null
+++ b/arch/arm/mach-zte/Kconfig
-@@ -0,0 +1,23 @@
+@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0
+menuconfig ARCH_ZTE
-+ bool "ZTE ZX family"
++ bool "ZTE zx family"
+ depends on ARCH_MULTI_V7
+ help
-+ Support for ZTE ZX-based family of processors.
++ Support for ZTE zx-based family of processors.
+
+if ARCH_ZTE
+
@@ -194,10 +242,11 @@
+ default y if ARCH_ZTE
+ bool "ZX297520v3"
+ select ARM_GIC_V3
++ select ARM_AMBA
+ select HAVE_ARM_ARCH_TIMER
+ select PM_GENERIC_DOMAINS if PM
+ help
-+ Support for ZTE ZX297520v3 SoC. It a single core SoC used in cheap LTE to WiFi routers.
++ Support for ZTE zx297520v3 SoC. It a single core SoC used in cheap LTE to WiFi routers.
+ These devices can be Identified by the occurrence of the string "zx297520v3" in the boot
+ output and /proc/cpuinfo of their stock firmware.
+
@@ -214,7 +263,7 @@
+obj-$(CONFIG_SOC_ZX297520V3) += zx297520v3.o
diff --git a/arch/arm/mach-zte/zx297520v3.c b/arch/arm/mach-zte/zx297520v3.c
new file mode 100644
-index 000000000000..e8db18c2f665
+index 000000000000..c11c7e836f91
--- /dev/null
+++ b/arch/arm/mach-zte/zx297520v3.c
@@ -0,0 +1,19 @@
@@ -234,9 +283,10 @@
+ NULL,
+};
+
-+DT_MACHINE_START(ZX, "ZTE ZX297520v3 (Device Tree)")
++DT_MACHINE_START(ZX, "ZTE zx297520v3 (Device Tree)")
+ .dt_compat = zx297520v3_dt_compat,
+MACHINE_END
+
--
2.52.0