The UCON BIT(10) is set on boot on the S5L serials on Apple Silicon Macs
of all generations and old iPhones [1]. It's unknown what it does
exactly, but on the MacBook Neo (A18 Pro / T8140 SoC) clearing this bit
breaks the uart and leads to garbled data in both directions.
Add it to the APPLE_S5L_UCON_MASK to prevent it being cleared.
Link[1]: https://oftc.catirclogs.org/asahi-dev/2026-07-24#35537011
Signed-off-by: Yureka Lilian <redacted>
---
include/linux/serial_s3c.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h
index f54cb6e23f85..1732bc9240ff 100644
--- a/include/linux/serial_s3c.h
+++ b/include/linux/serial_s3c.h
@@ -247,10 +247,12 @@
S5PV210_UFCON_RXTRIG4)
#define APPLE_S5L_UCON_RXTO_ENA 9
+#define APPLE_S5L_UCON_UNK 10
#define APPLE_S5L_UCON_RXTO_LEGACY_ENA 11
#define APPLE_S5L_UCON_RXTHRESH_ENA 12
#define APPLE_S5L_UCON_TXTHRESH_ENA 13
#define APPLE_S5L_UCON_RXTO_ENA_MSK BIT(APPLE_S5L_UCON_RXTO_ENA)
+#define APPLE_S5L_UCON_UNK_MSK BIT(APPLE_S5L_UCON_UNK)
#define APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK BIT(APPLE_S5L_UCON_RXTO_LEGACY_ENA)
#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK BIT(APPLE_S5L_UCON_RXTHRESH_ENA)
#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK BIT(APPLE_S5L_UCON_TXTHRESH_ENA)
@@ -259,6 +261,7 @@
S3C2410_UCON_RXIRQMODE | \
S3C2410_UCON_RXFIFO_TOI)
#define APPLE_S5L_UCON_MASK (APPLE_S5L_UCON_RXTO_ENA_MSK | \
+ APPLE_S5L_UCON_UNK_MSK | \
APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK | \
APPLE_S5L_UCON_RXTHRESH_ENA_MSK | \
APPLE_S5L_UCON_TXTHRESH_ENA_MSK)
---
base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
change-id: 20260904-apple-s5l-a18-pro-5f2b3e1a4e4a
Best regards,
--
Yureka Lilian [off-list ref]