diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index a36fc30e6f262f0608e0bc77d02771d13d0e0921..5196389428b21b7d15569e7469380bf190f46d67 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -71,6 +71,7 @@
#define ISR_GCAD (1 << 8) /* general call address detected */
#define ISR_SAD (1 << 9) /* slave address detected */
#define ISR_BED (1 << 10) /* bus error no ACK/NAK */
+#define ISR_A3700_EBB (1 << 11) /* early bus busy for armada 3700 */
#define ILCR_SLV_SHIFT 0
#define ILCR_SLV_MASK (0x1FF << ILCR_SLV_SHIFT)
@@ -263,6 +264,7 @@ struct pxa_i2c {
bool highmode_enter;
u32 fm_mask;
u32 hs_mask;
+ u32 busy_mask;
struct i2c_bus_recovery_info recovery;
struct pinctrl *pinctrl;@@ -429,7 +431,7 @@ static int i2c_pxa_wait_bus_not_busy(struct pxa_i2c *i2c)
while (1) {
isr = readl(_ISR(i2c));
- if (!(isr & (ISR_IBB | ISR_UB)))
+ if (!(isr & i2c->busy_mask))
return 0;
if (isr & ISR_SAD)@@ -466,7 +468,7 @@ static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
* quick check of the i2c lines themselves to ensure they've
* gone high...
*/
- if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) == 0 &&
+ if ((readl(_ISR(i2c)) & i2c->busy_mask) == 0 &&
readl(_IBMR(i2c)) == (IBMR_SCLS | IBMR_SDAS)) {
if (i2c_debug > 0)
dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);@@ -487,7 +489,7 @@ static int i2c_pxa_set_master(struct pxa_i2c *i2c)
if (i2c_debug)
dev_dbg(&i2c->adap.dev, "setting to bus master\n");
- if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) != 0) {
+ if ((readl(_ISR(i2c)) & i2c->busy_mask) != 0) {
dev_dbg(&i2c->adap.dev, "%s: unit is busy\n", __func__);
if (!i2c_pxa_wait_master(i2c)) {
dev_dbg(&i2c->adap.dev, "%s: error: unit busy\n", __func__);@@ -513,7 +515,7 @@ static int i2c_pxa_wait_slave(struct pxa_i2c *i2c)
dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
- if ((readl(_ISR(i2c)) & (ISR_UB|ISR_IBB)) == 0 ||
+ if ((readl(_ISR(i2c)) & i2c->busy_mask) == 0 ||
(readl(_ISR(i2c)) & ISR_SAD) != 0 ||
(readl(_ICR(i2c)) & ICR_SCLE) == 0) {
if (i2c_debug > 1)@@ -1171,7 +1173,7 @@ static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
/*
* Wait for the bus to become free.
*/
- while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB))
+ while (timeout-- && readl(_ISR(i2c)) & i2c->busy_mask)
udelay(1000);
if (timeout < 0) {@@ -1316,7 +1318,7 @@ static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap)
* handing control of the bus back to avoid the bus changing state.
*/
isr = readl(_ISR(i2c));
- if (isr & (ISR_UB | ISR_IBB)) {
+ if (isr & i2c->busy_mask) {
dev_dbg(&i2c->adap.dev,
"recovery: resetting controller, ISR=0x%08x\n", isr);
i2c_pxa_do_reset(i2c);@@ -1480,6 +1482,10 @@ static int i2c_pxa_probe(struct platform_device *dev)
i2c->fm_mask = pxa_reg_layout[i2c_type].fm;
i2c->hs_mask = pxa_reg_layout[i2c_type].hs;
+ i2c->busy_mask = ISR_UB | ISR_IBB;
+ if (i2c_type == REGS_A3700)
+ i2c->busy_mask |= ISR_A3700_EBB;
+
if (i2c_type != REGS_CE4100)
i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;
--
2.49.0