From: Samuel Holland <samuel@sholland.org> Date: 2022-12-31 22:02:23
This series finishes adding crypto support for the Allwinner D1 SoC. The
driver patch from v1 was merged, but not the binding[1]. This turned out
to be a good thing, because I later found that the TRNG needed another
clock reference in the devicetree. That is fixed in v2. I include the DT
update here too, since the SoC DT has been on the list for a while[2].
[1]: https://lore.kernel.org/all/20211119051026.13049-1-samuel@sholland.org/T/
[2]: https://lore.kernel.org/lkml/20221208090237.20572-1-samuel@sholland.org/
Changes in v2:
- Add TRNG clock
Samuel Holland (3):
dt-bindings: crypto: sun8i-ce: Add compatible for D1
crypto: sun8i-ce - Add TRNG clock to the D1 variant
riscv: dts: allwinner: d1: Add crypto engine node
.../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
.../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 +++++++
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 1 +
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 2 +-
4 files changed, 39 insertions(+), 9 deletions(-)
--
2.37.4
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From: Samuel Holland <samuel@sholland.org> Date: 2022-12-31 22:02:16
At least the D1 variant requires a separate clock for the TRNG.
Without this clock enabled, reading from /dev/hwrng reports:
sun8i-ce 3040000.crypto: DMA timeout for TRNG (tm=96) on flow 3
Experimentation shows that the necessary clock is the SoC's internal
RC oscillator. This makes sense, as noise from the oscillator can be
used as a source of entropy.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Changes in v2:
- New patch for v2
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 1 +
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
From: Samuel Holland <samuel@sholland.org> Date: 2022-12-31 22:02:28
D1 contains a crypto engine which is supported by the sun8i-ce driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Changes in v2:
- New patch for v2
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
From: Samuel Holland <samuel@sholland.org> Date: 2022-12-31 22:02:33
D1 has a crypto engine similar to the one in other Allwinner SoCs.
Like H6, it has a separate MBUS clock gate.
It also requires the internal RC oscillator to be enabled for the TRNG
to return data, presumably because noise from the oscillator is used as
an entropy source. This is likely the case for earlier variants as well,
but it really only matters for H616 and newer SoCs, as H6 provides no
way to disable the internal oscillator.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
I noticed that the vendor driver has code to explicitly enable IOSC when
using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by
a different binding/driver in mainline.
Changes in v2:
- Add TRNG clock
.../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
1 file changed, 25 insertions(+), 8 deletions(-)
From: Krzysztof Kozlowski <hidden> Date: 2023-01-01 15:58:02
On 31/12/2022 23:01, Samuel Holland wrote:
D1 has a crypto engine similar to the one in other Allwinner SoCs.
Like H6, it has a separate MBUS clock gate.
It also requires the internal RC oscillator to be enabled for the TRNG
to return data, presumably because noise from the oscillator is used as
an entropy source. This is likely the case for earlier variants as well,
but it really only matters for H616 and newer SoCs, as H6 provides no
way to disable the internal oscillator.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Reviewed-by: Krzysztof Kozlowski <redacted>
Best regards,
Krzysztof
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Dne sobota, 31. december 2022 ob 23:01:44 CET je Samuel Holland napisal(a):
At least the D1 variant requires a separate clock for the TRNG.
Without this clock enabled, reading from /dev/hwrng reports:
sun8i-ce 3040000.crypto: DMA timeout for TRNG (tm=96) on flow 3
Experimentation shows that the necessary clock is the SoC's internal
RC oscillator. This makes sense, as noise from the oscillator can be
used as a source of entropy.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
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Le Sat, Dec 31, 2022 at 04:01:44PM -0600, Samuel Holland a écrit :
At least the D1 variant requires a separate clock for the TRNG.
Without this clock enabled, reading from /dev/hwrng reports:
sun8i-ce 3040000.crypto: DMA timeout for TRNG (tm=96) on flow 3
Experimentation shows that the necessary clock is the SoC's internal
RC oscillator. This makes sense, as noise from the oscillator can be
used as a source of entropy.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Le Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland a écrit :
D1 has a crypto engine similar to the one in other Allwinner SoCs.
Like H6, it has a separate MBUS clock gate.
It also requires the internal RC oscillator to be enabled for the TRNG
to return data, presumably because noise from the oscillator is used as
an entropy source. This is likely the case for earlier variants as well,
but it really only matters for H616 and newer SoCs, as H6 provides no
way to disable the internal oscillator.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
I noticed that the vendor driver has code to explicitly enable IOSC when
using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by
a different binding/driver in mainline.
Changes in v2:
- Add TRNG clock
.../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
1 file changed, 25 insertions(+), 8 deletions(-)
From: Herbert Xu <herbert@gondor.apana.org.au> Date: 2023-01-13 03:52:05
On Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland wrote:
D1 has a crypto engine similar to the one in other Allwinner SoCs.
Like H6, it has a separate MBUS clock gate.
It also requires the internal RC oscillator to be enabled for the TRNG
to return data, presumably because noise from the oscillator is used as
an entropy source. This is likely the case for earlier variants as well,
but it really only matters for H616 and newer SoCs, as H6 provides no
way to disable the internal oscillator.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
I noticed that the vendor driver has code to explicitly enable IOSC when
using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by
a different binding/driver in mainline.
Changes in v2:
- Add TRNG clock
.../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
1 file changed, 25 insertions(+), 8 deletions(-)
From: Krzysztof Kozlowski <hidden> Date: 2023-01-13 08:34:21
On 13/01/2023 04:51, Herbert Xu wrote:
On Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland wrote:
quoted
D1 has a crypto engine similar to the one in other Allwinner SoCs.
Like H6, it has a separate MBUS clock gate.
It also requires the internal RC oscillator to be enabled for the TRNG
to return data, presumably because noise from the oscillator is used as
an entropy source. This is likely the case for earlier variants as well,
but it really only matters for H616 and newer SoCs, as H6 provides no
way to disable the internal oscillator.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
I noticed that the vendor driver has code to explicitly enable IOSC when
using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by
a different binding/driver in mainline.
Changes in v2:
- Add TRNG clock
.../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
1 file changed, 25 insertions(+), 8 deletions(-)
This doesn't have an ack from Rob Herring. Would you like me
to apply just the crypto patch by itself?
But it has my Reviewed-by, which is equivalent. Please take it via
crypto with the driver change.
Best regards,
Krzysztof
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From: Herbert Xu <herbert@gondor.apana.org.au> Date: 2023-01-13 08:40:43
On Sat, Dec 31, 2022 at 04:01:42PM -0600, Samuel Holland wrote:
This series finishes adding crypto support for the Allwinner D1 SoC. The
driver patch from v1 was merged, but not the binding[1]. This turned out
to be a good thing, because I later found that the TRNG needed another
clock reference in the devicetree. That is fixed in v2. I include the DT
update here too, since the SoC DT has been on the list for a while[2].
[1]: https://lore.kernel.org/all/20211119051026.13049-1-samuel@sholland.org/T/
[2]: https://lore.kernel.org/lkml/20221208090237.20572-1-samuel@sholland.org/
Changes in v2:
- Add TRNG clock
Samuel Holland (3):
dt-bindings: crypto: sun8i-ce: Add compatible for D1
crypto: sun8i-ce - Add TRNG clock to the D1 variant
riscv: dts: allwinner: d1: Add crypto engine node
.../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
.../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 +++++++
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 1 +
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 2 +-
4 files changed, 39 insertions(+), 9 deletions(-)
--
2.37.4
On Sat, 31 Dec 2022 14:01:45 PST (-0800), samuel@sholland.org wrote:
quoted hunk
D1 contains a crypto engine which is supported by the sun8i-ce driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Changes in v2:
- New patch for v2
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)