From: David Hildenbrand <hidden> Date: 2022-12-06 14:55:41
We already implemented support for 64bit book3s in commit bff9beaa2e80
("powerpc/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE for book3s")
Let's support __HAVE_ARCH_PTE_SWP_EXCLUSIVE also in 32bit by reusing yet
unused LSB 2 / MSB 29. There seems to be no real reason why that bit cannot
be used, and reusing it avoids having to steal one bit from the swap
offset.
While at it, mask the type in __swp_entry().
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Christophe Leroy <redacted>
Signed-off-by: David Hildenbrand <redacted>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 38 +++++++++++++++++---
1 file changed, 33 insertions(+), 5 deletions(-)
@@ -42,6 +42,9 @@#define _PMD_PRESENT_MASK (PAGE_MASK)#define _PMD_BAD (~PAGE_MASK)+/* We borrow the _PAGE_USER bit to store the exclusive marker in swap PTEs. */+#define _PAGE_SWP_EXCLUSIVE _PAGE_USER+/* And here we include common definitions */#define _PAGE_KERNEL_RO 0
Le 06/12/2022 à 15:47, David Hildenbrand a écrit :
quoted hunk
We already implemented support for 64bit book3s in commit bff9beaa2e80
("powerpc/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE for book3s")
Let's support __HAVE_ARCH_PTE_SWP_EXCLUSIVE also in 32bit by reusing yet
unused LSB 2 / MSB 29. There seems to be no real reason why that bit cannot
be used, and reusing it avoids having to steal one bit from the swap
offset.
While at it, mask the type in __swp_entry().
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Christophe Leroy <redacted>
Signed-off-by: David Hildenbrand <redacted>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 38 +++++++++++++++++---
1 file changed, 33 insertions(+), 5 deletions(-)
@@ -42,6 +42,9 @@#define _PMD_PRESENT_MASK (PAGE_MASK)#define _PMD_BAD (~PAGE_MASK)+/* We borrow the _PAGE_USER bit to store the exclusive marker in swap PTEs. */+#define _PAGE_SWP_EXCLUSIVE _PAGE_USER+/* And here we include common definitions */#define _PAGE_KERNEL_RO 0
That's in reversed order. _PAGE_HASHPTE is bit 30 and should be on the
right hand side. Etc ...
Some exemple in arch/powerpc/include/asm/nohash/32/pte-40x.h or
arch/powerpc/include/asm/nohash/32/pte-85xx.h
quoted hunk
+ *+ * E is the exclusive marker that is not stored in swap entries.+ * _PAGE_PRESENT (P) and __PAGE_HASHPTE (H) must be 0.+ *+ * For 64bit PTEs, the offset is extended by 32bit. */ #define __swp_type(entry) ((entry).val & 0x1f) #define __swp_offset(entry) ((entry).val >> 5)-#define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 5) })+#define __swp_entry(type, offset) ((swp_entry_t) { ((type) & 0x1f) | ((offset) << 5) }) #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 3 }) #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 3 })+#define __HAVE_ARCH_PTE_SWP_EXCLUSIVE+static inline int pte_swp_exclusive(pte_t pte)+{+ return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;+}++static inline pte_t pte_swp_mkexclusive(pte_t pte)+{+ return __pte(pte_val(pte) | _PAGE_SWP_EXCLUSIVE);+}++static inline pte_t pte_swp_clear_exclusive(pte_t pte)+{+ return __pte(pte_val(pte) & ~_PAGE_SWP_EXCLUSIVE);+}+ /* Generic accessors to PTE bits */ static inline int pte_write(pte_t pte) { return !!(pte_val(pte) & _PAGE_RW);} static inline int pte_read(pte_t pte) { return 1; }
From: David Hildenbrand <hidden> Date: 2022-12-08 08:54:05
On 07.12.22 14:55, Christophe Leroy wrote:
Le 06/12/2022 à 15:47, David Hildenbrand a écrit :
quoted
We already implemented support for 64bit book3s in commit bff9beaa2e80
("powerpc/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE for book3s")
Let's support __HAVE_ARCH_PTE_SWP_EXCLUSIVE also in 32bit by reusing yet
unused LSB 2 / MSB 29. There seems to be no real reason why that bit cannot
be used, and reusing it avoids having to steal one bit from the swap
offset.
While at it, mask the type in __swp_entry().
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Christophe Leroy <redacted>
Signed-off-by: David Hildenbrand <redacted>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 38 +++++++++++++++++---
1 file changed, 33 insertions(+), 5 deletions(-)
@@ -42,6 +42,9 @@#define _PMD_PRESENT_MASK (PAGE_MASK)#define _PMD_BAD (~PAGE_MASK)+/* We borrow the _PAGE_USER bit to store the exclusive marker in swap PTEs. */+#define _PAGE_SWP_EXCLUSIVE _PAGE_USER+/* And here we include common definitions */#define _PAGE_KERNEL_RO 0
From: David Hildenbrand <hidden> Date: 2022-12-08 08:57:16
On 08.12.22 09:52, David Hildenbrand wrote:
On 07.12.22 14:55, Christophe Leroy wrote:
quoted
Le 06/12/2022 à 15:47, David Hildenbrand a écrit :
quoted
We already implemented support for 64bit book3s in commit bff9beaa2e80
("powerpc/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE for book3s")
Let's support __HAVE_ARCH_PTE_SWP_EXCLUSIVE also in 32bit by reusing yet
unused LSB 2 / MSB 29. There seems to be no real reason why that bit cannot
be used, and reusing it avoids having to steal one bit from the swap
offset.
While at it, mask the type in __swp_entry().
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Christophe Leroy <redacted>
Signed-off-by: David Hildenbrand <redacted>
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 38 +++++++++++++++++---
1 file changed, 33 insertions(+), 5 deletions(-)
@@ -42,6 +42,9 @@#define _PMD_PRESENT_MASK (PAGE_MASK)#define _PMD_BAD (~PAGE_MASK)+/* We borrow the _PAGE_USER bit to store the exclusive marker in swap PTEs. */+#define _PAGE_SWP_EXCLUSIVE _PAGE_USER+/* And here we include common definitions */#define _PAGE_KERNEL_RO 0