From: Johan Jonker <hidden> Date: 2022-09-29 14:04:18
The Rockchip rk3288 SoC has 4-built-in PWM channels.
Configurable to operate in capture mode.
Measures the high/low polarity effective cycles of this input waveform
Generates a single interrupt at the transition of input waveform polarity
Configurable to operate in continuous mode or one-shot mode.
One-shot operation will produce N + 1 periods of the waveform,
where N is the repeat counter value, and generates a single interrupt at
the end of operation.
Continuous mode generates the waveform continuously and
do not generates any interrupts.
Add interrupts property to rk3288 PWM nodes.
Signed-off-by: Caesar Wang <redacted>
Signed-off-by: Johan Jonker <redacted>
---
Original patch location:
ARM: dts: rk3288: add the interrupts property for PWM
https://github.com/rockchip-linux/kernel/commit/16b7b284618d1652e694f6286f575ce82f5f03e5
---
"rockchip,rk3288-pwm" is in use as fall back string for Rockchip SoCs with combined
PWM interrupt.
---
arch/arm/boot/dts/rk3288.dtsi | 4 ++++
1 file changed, 4 insertions(+)
From: Robin Murphy <robin.murphy@arm.com> Date: 2022-09-29 15:50:59
On 2022-09-29 15:04, Johan Jonker wrote:
The Rockchip rk3288 SoC has 4-built-in PWM channels.
Configurable to operate in capture mode.
Measures the high/low polarity effective cycles of this input waveform
Generates a single interrupt at the transition of input waveform polarity
Configurable to operate in continuous mode or one-shot mode.
One-shot operation will produce N + 1 periods of the waveform,
where N is the repeat counter value, and generates a single interrupt at
the end of operation.
Continuous mode generates the waveform continuously and
do not generates any interrupts.
Add interrupts property to rk3288 PWM nodes.
Signed-off-by: Caesar Wang <redacted>
Signed-off-by: Johan Jonker <redacted>
---
Original patch location:
ARM: dts: rk3288: add the interrupts property for PWM
https://github.com/rockchip-linux/kernel/commit/16b7b284618d1652e694f6286f575ce82f5f03e5
---
"rockchip,rk3288-pwm" is in use as fall back string for Rockchip SoCs with combined
PWM interrupt.
---
arch/arm/boot/dts/rk3288.dtsi | 4 ++++
1 file changed, 4 insertions(+)
On Thu, Sep 29, 2022 at 04:50:43PM +0100, Robin Murphy wrote:
On 2022-09-29 15:04, Johan Jonker wrote:
quoted
The Rockchip rk3288 SoC has 4-built-in PWM channels.
Configurable to operate in capture mode.
Measures the high/low polarity effective cycles of this input waveform
Generates a single interrupt at the transition of input waveform polarity
Configurable to operate in continuous mode or one-shot mode.
One-shot operation will produce N + 1 periods of the waveform,
where N is the repeat counter value, and generates a single interrupt at
the end of operation.
Continuous mode generates the waveform continuously and
do not generates any interrupts.
Add interrupts property to rk3288 PWM nodes.
Huh, so it depends on a (software) setting which irqs are in use? So the
patch isn't correct as is, but I have no idea how to make it right.
Should we rely on the bootloader to fixup the dtb correctly?
Anyhow, I'm marking the patch as 'changes-requested' in our patchwork
instance.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
Am Mittwoch, 19. Oktober 2022, 09:26:21 CEST schrieb Uwe Kleine-König:
On Thu, Sep 29, 2022 at 04:50:43PM +0100, Robin Murphy wrote:
quoted
On 2022-09-29 15:04, Johan Jonker wrote:
quoted
The Rockchip rk3288 SoC has 4-built-in PWM channels.
Configurable to operate in capture mode.
Measures the high/low polarity effective cycles of this input waveform
Generates a single interrupt at the transition of input waveform polarity
Configurable to operate in continuous mode or one-shot mode.
One-shot operation will produce N + 1 periods of the waveform,
where N is the repeat counter value, and generates a single interrupt at
the end of operation.
Continuous mode generates the waveform continuously and
do not generates any interrupts.
Add interrupts property to rk3288 PWM nodes.
Huh, so it depends on a (software) setting which irqs are in use?
In the past when Rockchip swapped one IP block for another they often
had both in a soc for one generation (as a safeguard probably)
So the rk3288 has two different pwm implementations and the GRF
register selects which one is active.
Heiko
So the
patch isn't correct as is, but I have no idea how to make it right.
Should we rely on the bootloader to fixup the dtb correctly?
Anyhow, I'm marking the patch as 'changes-requested' in our patchwork
instance.
Best regards
Uwe
From: Rob Herring <robh@kernel.org> Date: 2022-09-30 19:55:12
On Thu, Sep 29, 2022 at 04:04:06PM +0200, Johan Jonker wrote:
The Rockchip rk3288 SoC has 4-built-in PWM channels.
Configurable to operate in capture mode.
Measures the high/low polarity effective cycles of this input waveform
Generates a single interrupt at the transition of input waveform polarity
Configurable to operate in continuous mode or one-shot mode.
One-shot operation will produce N + 1 periods of the waveform,
where N is the repeat counter value, and generates a single interrupt at
the end of operation.
Continuous mode generates the waveform continuously and
do not generates any interrupts.
Add interrupts property to rk3288 PWM nodes.
Signed-off-by: Caesar Wang <redacted>
Signed-off-by: Johan Jonker <redacted>
---
Please thread your series properly. That's replies to the cover letter
or patch 1 if there isn't a cover letter. git-send-email does this by
default.
Rob
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