The new STmicroelectronics STM32MP13 SoC embeds a new version
of the SDMMC peripheral (v2.2).
It supports SDR104 and HS200 modes.
Yann Gautier (4):
mmc: mmci: Add support for sdmmc variant revision v2.2
mmc: mmci: increase stm32 sdmmcv2 clock max freq
mmc: mmci: stm32: clear DLYB_CR after sending tuning command
mmc: mmci: add hs200 support for stm32 sdmmc
drivers/mmc/host/mmci.c | 7 ++++++-
drivers/mmc/host/mmci_stm32_sdmmc.c | 7 +++++--
2 files changed, 11 insertions(+), 3 deletions(-)
--
2.17.1
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Use feedback clock for HS200 mode, as for SDR104.
The HS200 mode can be enabled through DT by using mmc-hs200-1_8v.
It is possible to use it on STM32MP13, but not STM32MP15 platforms.
Signed-off-by: Ludovic Barre <redacted>
Signed-off-by: Yann Gautier <redacted>
---
drivers/mmc/host/mmci_stm32_sdmmc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
From: Marek Vasut <marex@denx.de> Date: 2021-12-16 09:14:52
On 12/15/21 15:17, Yann Gautier wrote:
Use feedback clock for HS200 mode, as for SDR104.
The HS200 mode can be enabled through DT by using mmc-hs200-1_8v.
It is possible to use it on STM32MP13, but not STM32MP15 platforms.
HS200 is possible even on the MP15, it just doesn't yield any
(performance) benefits due to the slower bus clock (125 MHz or so?), so
it isn't worth enabling it on MP15. It is nice to see MP13 can do better.
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Use feedback clock for HS200 mode, as for SDR104.
The HS200 mode can be enabled through DT by using mmc-hs200-1_8v.
It is possible to use it on STM32MP13, but not STM32MP15 platforms.
HS200 is possible even on the MP15, it just doesn't yield any
(performance) benefits due to the slower bus clock (125 MHz or so?), so
it isn't worth enabling it on MP15. It is nice to see MP13 can do better.
From: Marek Vasut <marex@denx.de> Date: 2021-12-16 10:15:27
On 12/16/21 10:44, Yann Gautier wrote:
On 12/16/21 10:14 AM, Marek Vasut wrote:
quoted
On 12/15/21 15:17, Yann Gautier wrote:
quoted
Use feedback clock for HS200 mode, as for SDR104.
The HS200 mode can be enabled through DT by using mmc-hs200-1_8v.
It is possible to use it on STM32MP13, but not STM32MP15 platforms.
HS200 is possible even on the MP15, it just doesn't yield any
(performance) benefits due to the slower bus clock (125 MHz or so?),
so it isn't worth enabling it on MP15. It is nice to see MP13 can do
better.
Oh, I see, so I was lucky to even ever get it working at all.
Thanks for the info.
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During test campaign, and especially after several unbind/bind sequences,
it has been seen that the SD-card on SDMMC1 thread could freeze.
The freeze always appear on a CMD23 following a CMD19.
Checking SDMMC internal registers shows that the tuning command (CMD19)
has failed.
The freeze is then due to the delay block involved in the tuning sequence.
To correct this, clear the delay block register DLYB_CR register after
the tuning commands.
Signed-off-by: Christophe Kerello <redacted>
Signed-off-by: Yann Gautier <redacted>
---
drivers/mmc/host/mmci_stm32_sdmmc.c | 2 ++
1 file changed, 2 insertions(+)
From: Marek Vasut <marex@denx.de> Date: 2021-12-16 09:13:34
On 12/15/21 15:17, Yann Gautier wrote:
quoted hunk
During test campaign, and especially after several unbind/bind sequences,
it has been seen that the SD-card on SDMMC1 thread could freeze.
The freeze always appear on a CMD23 following a CMD19.
Checking SDMMC internal registers shows that the tuning command (CMD19)
has failed.
The freeze is then due to the delay block involved in the tuning sequence.
To correct this, clear the delay block register DLYB_CR register after
the tuning commands.
Signed-off-by: Christophe Kerello <redacted>
Signed-off-by: Yann Gautier <redacted>
---
drivers/mmc/host/mmci_stm32_sdmmc.c | 2 ++
1 file changed, 2 insertions(+)
Shouldn't this have a Fixes: tag and be CC stable ?
This seems like a bugfix, no ?
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During test campaign, and especially after several unbind/bind sequences,
it has been seen that the SD-card on SDMMC1 thread could freeze.
The freeze always appear on a CMD23 following a CMD19.
Checking SDMMC internal registers shows that the tuning command (CMD19)
has failed.
The freeze is then due to the delay block involved in the tuning
sequence.
To correct this, clear the delay block register DLYB_CR register after
the tuning commands.
Signed-off-by: Christophe Kerello <redacted>
Signed-off-by: Yann Gautier <redacted>
---
drivers/mmc/host/mmci_stm32_sdmmc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c
b/drivers/mmc/host/mmci_stm32_sdmmc.c
index fdaa11f92fe6..a75d3dd34d18 100644
Shouldn't this have a Fixes: tag and be CC stable ?
This seems like a bugfix, no ?
Hi Marek,
You're right, I should have added:
Fixes: 1103f807a3b9 ("mmc: mmci_sdmmc: Add execute tuning with delay block")
Ulf, could you manage that, or should I push a new version?
Best regards,
Yann
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On Thu, 16 Dec 2021 at 10:49, Yann Gautier [off-list ref] wrote:
On 12/16/21 10:13 AM, Marek Vasut wrote:
quoted
On 12/15/21 15:17, Yann Gautier wrote:
quoted
During test campaign, and especially after several unbind/bind sequences,
it has been seen that the SD-card on SDMMC1 thread could freeze.
The freeze always appear on a CMD23 following a CMD19.
Checking SDMMC internal registers shows that the tuning command (CMD19)
has failed.
The freeze is then due to the delay block involved in the tuning
sequence.
To correct this, clear the delay block register DLYB_CR register after
the tuning commands.
Signed-off-by: Christophe Kerello <redacted>
Signed-off-by: Yann Gautier <redacted>
---
drivers/mmc/host/mmci_stm32_sdmmc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c
b/drivers/mmc/host/mmci_stm32_sdmmc.c
index fdaa11f92fe6..a75d3dd34d18 100644
Shouldn't this have a Fixes: tag and be CC stable ?
This seems like a bugfix, no ?
Hi Marek,
You're right, I should have added:
Fixes: 1103f807a3b9 ("mmc: mmci_sdmmc: Add execute tuning with delay block")
Ulf, could you manage that, or should I push a new version?
Patch applied for fixes and by adding a stable tag too, thanks!
Kind regards
Uffe
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The variant->f_max is dependent on the IP, not on the SoC where it is
embedded. Set the max frequency of its source clock to 267MHz.
The frequency used will be limited by the IOs max frequency, set in the
SoC device tree.
Signed-off-by: Yann Gautier <redacted>
---
drivers/mmc/host/mmci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
The change is only hardware, and does not need driver change:
Added hardware flow control during transmit packet with variable delay.
The new id is then added to the ids list structure.
Signed-off-by: Yann Gautier <redacted>
---
drivers/mmc/host/mmci.c | 5 +++++
1 file changed, 5 insertions(+)
On Wed, 15 Dec 2021 at 15:18, Yann Gautier [off-list ref] wrote:
The new STmicroelectronics STM32MP13 SoC embeds a new version
of the SDMMC peripheral (v2.2).
It supports SDR104 and HS200 modes.
Yann Gautier (4):
mmc: mmci: Add support for sdmmc variant revision v2.2
mmc: mmci: increase stm32 sdmmcv2 clock max freq
mmc: mmci: stm32: clear DLYB_CR after sending tuning command
mmc: mmci: add hs200 support for stm32 sdmmc
drivers/mmc/host/mmci.c | 7 ++++++-
drivers/mmc/host/mmci_stm32_sdmmc.c | 7 +++++--
2 files changed, 11 insertions(+), 3 deletions(-)
--
2.17.1