From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-04 21:58:26
Modern ARM64 Samsung Exynos SoCs (like Exynos Auto V9 and Exynos850) use
pretty much the same High-Speed I2C controller supported in i2c-exynos5
driver ("samsung,exynos7-hsi2c" variant), but with some differences:
- timings are now calculated and configured a bit differently
- two clocks are now provided to HSI2C controller (and must be
asserted during I2C operation and register access)
This patch series implements these changes, making it possible to use
HSI2C driver on modern Exynos SoCs.
Another change in mentioned SoCs is that HSI2C controller is now a part
of USIv2 IP-core. But no USI modifications are needed in HSI2C driver,
as all USI related configuration is done in USI driver independently.
USI driver is added in [1] series (or its later revision, if available).
To make HSI2C functional, both patch series (this one and [1]) have to
be applied, but those can be applied independently.
Changes in v2:
- Added new patches renaming "hsi2c@*" nodes to "i2c@*" for Exynos
dts's
- Added R-b tags from v1 review
- Fixed and improved i2c-exynos5 dt-bindings
[1] https://patchwork.kernel.org/project/linux-samsung-soc/cover/20211204195757.8600-1-semen.protsenko@linaro.org/
Jaewon Kim (2):
dt-bindings: i2c: exynos5: Add exynosautov9-hsi2c compatible
i2c: exynos5: Add support for ExynosAutoV9 SoC
Sam Protsenko (6):
dt-bindings: i2c: exynos5: Convert to dtschema
dt-bindings: i2c: exynos5: Add bus clock
i2c: exynos5: Add bus clock support
i2c: exynos5: Mention Exynos850 and ExynosAutoV9 in Kconfig
arm: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260
arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and
Exynos7
.../devicetree/bindings/i2c/i2c-exynos5.txt | 53 -------
.../devicetree/bindings/i2c/i2c-exynos5.yaml | 133 ++++++++++++++++++
arch/arm/boot/dts/exynos5260.dtsi | 8 +-
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++--
arch/arm64/boot/dts/exynos/exynos7.dtsi | 24 ++--
drivers/i2c/busses/Kconfig | 2 +-
drivers/i2c/busses/i2c-exynos5.c | 108 +++++++++++---
7 files changed, 253 insertions(+), 99 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
--
2.30.2
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From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-04 21:58:30
From: Jaewon Kim <redacted>
This patch adds new "samsung,exynosautov9-hsi2c" compatible.
It is for i2c compatible with HSI2C available on Exynos SoC with USI.
Signed-off-by: Jaewon Kim <redacted>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
- Removed quotes around compatible strings
- Added Exynos850 to comment
Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 6 ++++++
1 file changed, 6 insertions(+)
@@ -13,6 +13,11 @@ description: |The Samsung's High Speed I2C controller is used to interface with I2C devicesat various speeds ranging from 100kHz to 3.4MHz.+In case the HSI2C controller is encapsulated within USI block (it's the case+e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to+define USI node in device tree file, choosing "i2c" configuration. Please see+Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.+allOf:-$ref:/schemas/i2c/i2c-controller.yaml#
@@ -23,6 +28,7 @@ properties:-samsung,exynos5250-hsi2c# Exynos5250 and Exynos5420-samsung,exynos5260-hsi2c# Exynos5260-samsung,exynos7-hsi2c# Exynos7+-samsung,exynosautov9-hsi2c# ExynosAutoV9 and Exynos850-const:samsung,exynos5-hsi2c# Exynos5250 and Exynos5420deprecated:true
--
2.30.2
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From: Rob Herring <robh@kernel.org> Date: 2021-12-06 21:03:52
On Sat, 04 Dec 2021 23:58:14 +0200, Sam Protsenko wrote:
From: Jaewon Kim <redacted>
This patch adds new "samsung,exynosautov9-hsi2c" compatible.
It is for i2c compatible with HSI2C available on Exynos SoC with USI.
Signed-off-by: Jaewon Kim <redacted>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
- Removed quotes around compatible strings
- Added Exynos850 to comment
Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 6 ++++++
1 file changed, 6 insertions(+)
From: Wolfram Sang <wsa@kernel.org> Date: 2021-12-09 09:11:24
On Sat, Dec 04, 2021 at 11:58:14PM +0200, Sam Protsenko wrote:
From: Jaewon Kim <redacted>
This patch adds new "samsung,exynosautov9-hsi2c" compatible.
It is for i2c compatible with HSI2C available on Exynos SoC with USI.
Signed-off-by: Jaewon Kim <redacted>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-04 21:58:33
From: Jaewon Kim <redacted>
ExynosAutoV9 functioning logic mostly follows I2C_TYPE_EXYNOS7, but
timing calculation and configuration procedure is changed: e.g. only
timing_s3 has to be set now.
Another change of HSI2C controller in ExynosAutoV9 SoC is that it's now
a part of USIv2 IP-core. No changes is needed for I2C driver though, as
all USI related configuration is done in USI driver.
Signed-off-by: Jaewon Kim <redacted>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
drivers/i2c/busses/i2c-exynos5.c | 62 +++++++++++++++++++++++++++-----
1 file changed, 53 insertions(+), 9 deletions(-)
@@ -422,7 +456,10 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id)writel(int_status,i2c->regs+HSI2C_INT_STATUS);/* handle interrupt related to the transfer status */-if(i2c->variant->hw==I2C_TYPE_EXYNOS7){+switch(i2c->variant->hw){+caseI2C_TYPE_EXYNOSAUTOV9:+fallthrough;+caseI2C_TYPE_EXYNOS7:if(int_status&HSI2C_INT_TRANS_DONE){i2c->trans_done=1;i2c->state=0;
From: Wolfram Sang <wsa@kernel.org> Date: 2021-12-09 09:11:36
On Sat, Dec 04, 2021 at 11:58:16PM +0200, Sam Protsenko wrote:
From: Jaewon Kim <redacted>
ExynosAutoV9 functioning logic mostly follows I2C_TYPE_EXYNOS7, but
timing calculation and configuration procedure is changed: e.g. only
timing_s3 has to be set now.
Another change of HSI2C controller in ExynosAutoV9 SoC is that it's now
a part of USIv2 IP-core. No changes is needed for I2C driver though, as
all USI related configuration is done in USI driver.
Signed-off-by: Jaewon Kim <redacted>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-04 21:58:38
In Device Tree specification it's recommended to use "i2c" name for I2C
nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some
warnings like this when validating HS-I2C nodes:
hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match
'^i2c(@.*)?'
From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Rename hsi2c@* to i2c@* to fix those warnings.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
- This patch was added in v2
arch/arm/boot/dts/exynos5260.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
From: Krzysztof Kozlowski <hidden> Date: 2021-12-06 08:30:52
On Sat, 4 Dec 2021 23:58:19 +0200, Sam Protsenko wrote:
In Device Tree specification it's recommended to use "i2c" name for I2C
nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some
warnings like this when validating HS-I2C nodes:
hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match
'^i2c(@.*)?'
From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
[...]
Applied, thanks!
[7/8] arm: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260
commit: 29bf0ff5ae18ad1a6dd183569cc097e578052c57
Best regards,
--
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From: Wolfram Sang <wsa@kernel.org> Date: 2021-12-09 14:49:03
On Sat, Dec 04, 2021 at 11:58:19PM +0200, Sam Protsenko wrote:
In Device Tree specification it's recommended to use "i2c" name for I2C
nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some
warnings like this when validating HS-I2C nodes:
hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match
'^i2c(@.*)?'
From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Rename hsi2c@* to i2c@* to fix those warnings.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-09 15:22:53
On Thu, 9 Dec 2021 at 16:49, Wolfram Sang [off-list ref] wrote:
On Sat, Dec 04, 2021 at 11:58:19PM +0200, Sam Protsenko wrote:
quoted
In Device Tree specification it's recommended to use "i2c" name for I2C
nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some
warnings like this when validating HS-I2C nodes:
hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match
'^i2c(@.*)?'
From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Rename hsi2c@* to i2c@* to fix those warnings.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
From: Krzysztof Kozlowski <hidden> Date: 2021-12-09 18:26:26
On 09/12/2021 15:48, Wolfram Sang wrote:
On Sat, Dec 04, 2021 at 11:58:19PM +0200, Sam Protsenko wrote:
quoted
In Device Tree specification it's recommended to use "i2c" name for I2C
nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some
warnings like this when validating HS-I2C nodes:
hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match
'^i2c(@.*)?'
From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Rename hsi2c@* to i2c@* to fix those warnings.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Applied to for-next, thanks!
I applied the DTS patches, because they should go via arm-soc tree.
Please drop them from I2C.
Best regards,
Krzysztof
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From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-04 21:58:38
In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
part of USIv2 block, there are two clocks provided to HSI2C controller:
- PCLK: bus clock (APB), provides access to register interface
- IPCLK: operating IP-core clock; SCL is derived from this one
Both clocks have to be asserted for HSI2C to be functional in that case.
Add code to obtain and enable/disable PCLK in addition to already
handled operating clock. Make it optional though, as older Exynos SoC
variants only have one HSI2C clock.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
Reviewed-by: Chanho Park <redacted>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
- Added R-b tag by Chanho Park
drivers/i2c/busses/i2c-exynos5.c | 46 ++++++++++++++++++++++++++------
1 file changed, 38 insertions(+), 8 deletions(-)
From: Wolfram Sang <wsa@kernel.org> Date: 2021-12-09 09:12:00
On Sat, Dec 04, 2021 at 11:58:17PM +0200, Sam Protsenko wrote:
In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
part of USIv2 block, there are two clocks provided to HSI2C controller:
- PCLK: bus clock (APB), provides access to register interface
- IPCLK: operating IP-core clock; SCL is derived from this one
Both clocks have to be asserted for HSI2C to be functional in that case.
Add code to obtain and enable/disable PCLK in addition to already
handled operating clock. Make it optional though, as older Exynos SoC
variants only have one HSI2C clock.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
Reviewed-by: Chanho Park <redacted>
This one doesn't apply here? What tree is this based on?
From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-09 14:07:26
On Thu, 9 Dec 2021 at 11:11, Wolfram Sang [off-list ref] wrote:
On Sat, Dec 04, 2021 at 11:58:17PM +0200, Sam Protsenko wrote:
quoted
In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
part of USIv2 block, there are two clocks provided to HSI2C controller:
- PCLK: bus clock (APB), provides access to register interface
- IPCLK: operating IP-core clock; SCL is derived from this one
Both clocks have to be asserted for HSI2C to be functional in that case.
Add code to obtain and enable/disable PCLK in addition to already
handled operating clock. Make it optional though, as older Exynos SoC
variants only have one HSI2C clock.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
Reviewed-by: Chanho Park <redacted>
This one doesn't apply here? What tree is this based on?
Based on linux-next. Might got outdated, or maybe I had some debug
patches in my branch at the time. Anyway, I've sent v3 only for this
patch [1]. Can you please try to apply that one?
Thanks!
[1] https://lkml.org/lkml/2021/12/9/584
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From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-04 21:58:41
In Device Tree specification it's recommended to use "i2c" name for I2C
nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some
warnings like this when validating HS-I2C nodes:
hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match
'^i2c(@.*)?'
From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Rename hsi2c@* to i2c@* to fix those warnings.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
- This patch was added in v2
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 +++++++++++-----------
arch/arm64/boot/dts/exynos/exynos7.dtsi | 24 +++++++++++-----------
2 files changed, 24 insertions(+), 24 deletions(-)
From: Krzysztof Kozlowski <hidden> Date: 2021-12-06 08:30:55
On Sat, 4 Dec 2021 23:58:20 +0200, Sam Protsenko wrote:
In Device Tree specification it's recommended to use "i2c" name for I2C
nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some
warnings like this when validating HS-I2C nodes:
hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match
'^i2c(@.*)?'
From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
[...]
Applied, thanks!
[8/8] arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7
commit: 8858f8622e82170ec184971b66c7a455816190f8
Best regards,
--
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From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-04 21:58:45
I2C controller chosen by I2C_EXYNOS5 config option is also suitable for
Exynos850 and ExynosAutoV9 SoCs. State that specifically in I2C_EXYNOS5
symbol help section.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
Reviewed-by: Chanho Park <redacted>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
- Added R-b tag by Chanho Park
drivers/i2c/busses/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-09 13:35:03
On Sat, 4 Dec 2021 at 23:58, Sam Protsenko [off-list ref] wrote:
I2C controller chosen by I2C_EXYNOS5 config option is also suitable for
Exynos850 and ExynosAutoV9 SoCs. State that specifically in I2C_EXYNOS5
symbol help section.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
Reviewed-by: Chanho Park <redacted>
---
Wolfram, can you please also take this one in your tree?
quoted hunk
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
- Added R-b tag by Chanho Park
drivers/i2c/busses/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Wolfram Sang <wsa@kernel.org> Date: 2021-12-09 18:52:42
On Sat, Dec 04, 2021 at 11:58:18PM +0200, Sam Protsenko wrote:
I2C controller chosen by I2C_EXYNOS5 config option is also suitable for
Exynos850 and ExynosAutoV9 SoCs. State that specifically in I2C_EXYNOS5
symbol help section.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
Reviewed-by: Chanho Park <redacted>
From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-04 21:58:46
Convert Samsung Exynos High Speed I2C bindings doc to DT schema format.
Changes during bindings conversion:
1. Added missing required clock properties (driver fails when it's
unable to get the clock)
2. Removed properties and descriptions that can be found in
schemas/i2c/i2c-controller.yaml [1]
3. Fixed the example so it can be validated by dtschema
[1] https://github.com/robherring/dt-schema/blob/master/schemas/i2c/i2c-controller.yaml
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
---
Changes in v2:
- Added R-b tag by Krzysztof Kozlowski
.../devicetree/bindings/i2c/i2c-exynos5.txt | 53 ------------
.../devicetree/bindings/i2c/i2c-exynos5.yaml | 80 +++++++++++++++++++
2 files changed, 80 insertions(+), 53 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
@@ -1,53 +0,0 @@-* Samsung's High Speed I2C controller--The Samsung's High Speed I2C controller is used to interface with I2C devices-at various speeds ranging from 100khz to 3.4Mhz.--Required properties:- - compatible: value should be.- -> "samsung,exynos5-hsi2c", (DEPRECATED)- for i2c compatible with HSI2C available- on Exynos5250 and Exynos5420 SoCs.- -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available- on Exynos5250 and Exynos5420 SoCs.- -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available- on Exynos5260 SoCs.- -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available- on Exynos7 SoCs.-- - reg: physical base address of the controller and length of memory mapped- region.- - interrupts: interrupt number to the cpu.- - #address-cells: always 1 (for i2c addresses)- - #size-cells: always 0-- - Pinctrl:- - pinctrl-0: Pin control group to be used for this controller.- - pinctrl-names: Should contain only one value - "default".--Optional properties:- - clock-frequency: Desired operating frequency in Hz of the bus.- -> If not specified, the bus operates in fast-speed mode at- at 100khz.- -> If specified, the bus operates in high-speed mode only if the- clock-frequency is >= 1Mhz.--Example:--hsi2c@12ca0000 {- compatible = "samsung,exynos5250-hsi2c";- reg = <0x12ca0000 0x100>;- interrupts = <56>;- clock-frequency = <100000>;-- pinctrl-0 = <&i2c4_bus>;- pinctrl-names = "default";-- #address-cells = <1>;- #size-cells = <0>;-- s2mps11_pmic@66 {- compatible = "samsung,s2mps11-pmic";- reg = <0x66>;- };-};
@@ -0,0 +1,80 @@+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)+%YAML1.2+---+$id:http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#+$schema:http://devicetree.org/meta-schemas/core.yaml#++title:Samsung's High Speed I2C controller++maintainers:+-Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>++description:|+The Samsung's High Speed I2C controller is used to interface with I2C devices+at various speeds ranging from 100kHz to 3.4MHz.++allOf:+-$ref:/schemas/i2c/i2c-controller.yaml#++properties:+compatible:+oneOf:+-enum:+-samsung,exynos5250-hsi2c# Exynos5250 and Exynos5420+-samsung,exynos5260-hsi2c# Exynos5260+-samsung,exynos7-hsi2c# Exynos7+-const:samsung,exynos5-hsi2c# Exynos5250 and Exynos5420+deprecated:true++reg:+maxItems:1++interrupts:+maxItems:1++clock-frequency:+default:100000+description:+Desired operating frequency in Hz of the bus.++If not specified, the bus operates in fast-speed mode at 100kHz.++If specified, the bus operates in high-speed mode only if the+clock-frequency is >= 1MHz.++clocks:+maxItems:1+description:I2C operating clock++clock-names:+const:hsi2c++required:+-compatible+-reg+-interrupts+-clocks++unevaluatedProperties:false++examples:+-|+#include <dt-bindings/clock/exynos5420.h>+#include <dt-bindings/interrupt-controller/arm-gic.h>+#include <dt-bindings/interrupt-controller/irq.h>++hsi2c_8:i2c@12e00000 {+compatible = "samsung,exynos5250-hsi2c";+reg = <0x12e00000 0x1000>;+interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;+#address-cells = <1>;+#size-cells = <0>;+clock-frequency = <100000>;+clocks = <&clock CLK_USI4>;+clock-names = "hsi2c";++pmic@66 {+/* compatible = "samsung,s2mps11-pmic"; */+reg = <0x66>;+};+};
--
2.30.2
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From: Wolfram Sang <wsa@kernel.org> Date: 2021-12-09 09:11:12
On Sat, Dec 04, 2021 at 11:58:13PM +0200, Sam Protsenko wrote:
Convert Samsung Exynos High Speed I2C bindings doc to DT schema format.
Changes during bindings conversion:
1. Added missing required clock properties (driver fails when it's
unable to get the clock)
2. Removed properties and descriptions that can be found in
schemas/i2c/i2c-controller.yaml [1]
3. Fixed the example so it can be validated by dtschema
[1] https://github.com/robherring/dt-schema/blob/master/schemas/i2c/i2c-controller.yaml
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <redacted>
From: Sam Protsenko <semen.protsenko@linaro.org> Date: 2021-12-04 21:58:49
In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
part of USIv2 block, there are two clocks provided to HSI2C controller:
- PCLK: bus clock (APB), provides access to register interface
- IPCLK: operating IP-core clock; SCL is derived from this one
Both clocks have to be asserted for HSI2C to be functional in that case.
Modify bindings doc to allow specifying bus clock in addition to
already described operating clock.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
- Added 'clock-names' property to 'required:' in case of ExynosAutoV9
- Added example for two clocks case
.../devicetree/bindings/i2c/i2c-exynos5.yaml | 59 +++++++++++++++++--
1 file changed, 53 insertions(+), 6 deletions(-)
From: Krzysztof Kozlowski <hidden> Date: 2021-12-06 08:27:38
On 04/12/2021 22:58, Sam Protsenko wrote:
In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
part of USIv2 block, there are two clocks provided to HSI2C controller:
- PCLK: bus clock (APB), provides access to register interface
- IPCLK: operating IP-core clock; SCL is derived from this one
Both clocks have to be asserted for HSI2C to be functional in that case.
Modify bindings doc to allow specifying bus clock in addition to
already described operating clock.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
- Added 'clock-names' property to 'required:' in case of ExynosAutoV9
- Added example for two clocks case
.../devicetree/bindings/i2c/i2c-exynos5.yaml | 59 +++++++++++++++++--
1 file changed, 53 insertions(+), 6 deletions(-)
Reviewed-by: Krzysztof Kozlowski <redacted>
Best regards,
Krzysztof
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From: Wolfram Sang <wsa@kernel.org> Date: 2021-12-09 09:11:27
On Sat, Dec 04, 2021 at 11:58:15PM +0200, Sam Protsenko wrote:
In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
part of USIv2 block, there are two clocks provided to HSI2C controller:
- PCLK: bus clock (APB), provides access to register interface
- IPCLK: operating IP-core clock; SCL is derived from this one
Both clocks have to be asserted for HSI2C to be functional in that case.
Modify bindings doc to allow specifying bus clock in addition to
already described operating clock.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>