Currently, it is no longer possible to retrieve a DHCP address
on the imx6qdl-pico board.
This issue has been exposed by commit f5d9aa79dfdf ("ARM: imx6q:
remove clk-out fixup for the Atheros AR8031 and AR8035 PHYs").
Fix it by describing the qca,clk-out-frequency property as suggested
by the commit above.
Fixes: 98670a0bb0ef14bbb3 ("ARM: dts: imx6qdl: Add imx6qdl-pico support")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- Add the board name in the Subject.
arch/arm/boot/dts/imx6qdl-pico.dtsi | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-pico.dtsi b/arch/arm/boot/dts/imx6qdl-pico.dtsi
index 5de4ccb97916..0a55e1e583ae 100644
--- a/arch/arm/boot/dts/imx6qdl-pico.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-pico.dtsi
@@ -175,8 +175,19 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
- phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: ethernet-phy@1 {
+ reg = <1>;
+ qca,clk-out-frequency = <125000000>;
+ reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ };
+ };
};
&hdmi {--
2.25.1
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On Tue, Sep 14, 2021 at 11:51:12AM -0300, Fabio Estevam wrote:
quoted hunk
Currently, it is no longer possible to retrieve a DHCP address
on the imx6qdl-pico board.
This issue has been exposed by commit f5d9aa79dfdf ("ARM: imx6q:
remove clk-out fixup for the Atheros AR8031 and AR8035 PHYs").
Fix it by describing the qca,clk-out-frequency property as suggested
by the commit above.
Fixes: 98670a0bb0ef14bbb3 ("ARM: dts: imx6qdl: Add imx6qdl-pico support")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- Add the board name in the Subject.
arch/arm/boot/dts/imx6qdl-pico.dtsi | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-pico.dtsi b/arch/arm/boot/dts/imx6qdl-pico.dtsi
index 5de4ccb97916..0a55e1e583ae 100644
--- a/arch/arm/boot/dts/imx6qdl-pico.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-pico.dtsi
@@ -175,8 +175,19 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
- phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: ethernet-phy@1 {
+ reg = <1>;
+ qca,clk-out-frequency = <125000000>;
+ reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
Do you know how fast this PHY reacts after a reset?
arch/arm/boot/dts/imx6dl-riotboard.dts for example also has:
reset-deassert-us = <1000>;
so it has a bit of time to get going before trying to talk to it.
Andrew
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Hi Andrew,
On Tue, Sep 14, 2021 at 12:19 PM Andrew Lunn [off-list ref] wrote:
Do you know how fast this PHY reacts after a reset?
arch/arm/boot/dts/imx6dl-riotboard.dts for example also has:
It is an AR8035. According to the datasheet, a 1ms delay is
recommended after reset.
reset-deassert-us = <1000>;
Yes, this looks correct.
For now, I have sent v3 that only passes qca,clk-out-frequency to
avoid the regression.
I will revisit the reset properties later.
Thanks
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