From: Chester Lin <hidden> Date: 2021-09-08 06:46:05
Hello,
Here I'd like to propose a patchset, which is initial upstream support for NXP
S32G2. S32G is a processor family developed by NXP for automotive solutions,
such as vehicle networking and automotive high-performance processing. This
series focuses on S32G2, which is the latest generation we can find at the
moment. As the first round to support S32G2, this patchset only enables basic
components and interfaces the SoC must have while kernel booting, which aims
to have minimum hardware enablement for these two boards, S32G-VNP-EVB and
S32G-VNP-RDB2. The concepts of how these boards work are originated from the
downstream kernel tree[1] developed by NXP, which provides lots of details
about the SoC S32G274A and its integrated boards. This series has been
verified with downstream ATF[2] & U-Boot[3] based on the ATF boot flow.
Thanks,
Chester
[1] https://source.codeaurora.org/external/autobsps32/linux/
[2] https://source.codeaurora.org/external/autobsps32/arm-trusted-firmware/
[3] https://source.codeaurora.org/external/autobsps32/u-boot/
Changes in v2:
- dt-bindings:
- Rename the compatible vendor string to "nxp," for s32g2.
- Drop the specific description "S32V234 SoC".
- Fill my name in the maintainer field. I tried to contact the authors
of fsl,s32-linflexuart.txt but got no response.
- Remove redundant minItems/maxItems from compatible properties.
- Remove the redundant example from fsl,s32-linflexuart.yaml.
- dtsi/dts:
- Add a SoC description in s32g2.dtsi.
- Add an interrupt-affinity to the pmu node.
- Move the psci node into the "/firmware" node.
- Remove the redundant properties and white lines in DT.
- Remove the wrong interrupt specifier from the gic node.
- Specify the range and cell-size of /soc [0 - 4 GiB].
- Correct the reserved size of GICR to 512Kbytes [0x80000].
- Add new Signed-off-by to the DT uart patch.
- Fix copyright strings.
- Revise reg properties based on new cell-size.
- Move the serial/uart aliases from the SoC .dtsi to board .dts files.
- Correct the model string of RDB2.
- Add comments for the uart markings on PCB.
- Adjust RAM size comments of memory nodes.
- Convert reg addresses of memory nodes into hex format.
- MAINTAINERS
- Add information of reviewers.
Chester Lin (8):
dt-bindings: arm: fsl: add NXP S32G2 boards
dt-bindings: serial: fsl-linflexuart: convert to json-schema format
dt-bindings: serial: fsl-linflexuart: add compatible for S32G2
arm64: dts: add NXP S32G2 support
arm64: dts: s32g2: add serial/uart support
arm64: dts: s32g2: add VNP-EVB and VNP-RDB2 support
arm64: dts: s32g2: add memory nodes for evb and rdb2
MAINTAINERS: add an entry for NXP S32G boards
.../devicetree/bindings/arm/fsl.yaml | 7 +
.../bindings/serial/fsl,s32-linflexuart.txt | 22 ----
.../bindings/serial/fsl,s32-linflexuart.yaml | 48 +++++++
MAINTAINERS | 9 ++
arch/arm64/boot/dts/freescale/Makefile | 2 +
arch/arm64/boot/dts/freescale/s32g2.dtsi | 124 ++++++++++++++++++
.../arm64/boot/dts/freescale/s32g274a-evb.dts | 34 +++++
.../boot/dts/freescale/s32g274a-rdb2.dts | 40 ++++++
8 files changed, 264 insertions(+), 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt
create mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml
create mode 100644 arch/arm64/boot/dts/freescale/s32g2.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-evb.dts
create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
--
2.30.0
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@@ -990,6 +990,13 @@ properties:-const:solidrun,lx2160a-cex7-const:fsl,lx2160a+-description:S32G2 based Boards+items:+-enum:+-nxp,s32g274a-evb+-nxp,s32g274a-rdb2+-const:nxp,s32g2+-description:S32V234 based Boardsitems:-enum:
--
2.30.0
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From: Chester Lin <hidden> Date: 2021-09-08 06:46:30
Convert the FSL LINFlexD UART binding to json-schema.
Signed-off-by: Chester Lin <redacted>
Reviewed-by: Andreas Färber <afaerber@suse.de>
---
Changes in v2:
- Drop the specific description "S32V234 SoC".
- Fill my name in the maintainer field. I tried to contact the authors
of fsl,s32-linflexuart.txt but got no response.
.../bindings/serial/fsl,s32-linflexuart.txt | 22 ---------
.../bindings/serial/fsl,s32-linflexuart.yaml | 46 +++++++++++++++++++
2 files changed, 46 insertions(+), 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt
create mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml
@@ -1,22 +0,0 @@-* Freescale LINFlexD UART--The LINFlexD controller implements several LIN protocol versions, as well as-support for full-duplex UART communication through 8-bit and 9-bit frames.--See chapter 47 ("LINFlexD") in the reference manual[1].--Required properties:-- compatible :- - "fsl,s32v234-linflexuart" for LINFlexD configured in UART mode, which- is compatible with the one integrated on S32V234 SoC-- reg : Address and length of the register set for the device-- interrupts : Should contain uart interrupt--Example:-uart0: serial@40053000 {- compatible = "fsl,s32v234-linflexuart";- reg = <0x0 0x40053000 0x0 0x1000>;- interrupts = <0 59 4>;-};--[1] https://www.nxp.com/webapp/Download?colCode=S32V234RM
@@ -0,0 +1,46 @@+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)+%YAML1.2+---+$id:http://devicetree.org/schemas/serial/fsl,s32-linflexuart.yaml#+$schema:http://devicetree.org/meta-schemas/core.yaml#++title:Freescale LINFlexD UART++description:|+The LINFlexD controller implements several LIN protocol versions, as well+as support for full-duplex UART communication through 8-bit and 9-bit+frames. See chapter 47 ("LINFlexD") in the reference manual+https://www.nxp.com/webapp/Download?colCode=S32V234RM.++maintainers:+-Chester Lin <clin@suse.com>++allOf:+-$ref:"serial.yaml"++properties:+compatible:+description:The LINFlexD controller in UART mode.+items:+-const:fsl,s32v234-linflexuart++reg:+maxItems:1++interrupts:+maxItems:1++required:+-compatible+-reg+-interrupts++unevaluatedProperties:false++examples:+-|+serial@40053000 {+compatible = "fsl,s32v234-linflexuart";+reg = <0x40053000 0x1000>;+interrupts = <0 59 4>;+};
--
2.30.0
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From: Chester Lin <hidden> Date: 2021-09-08 06:46:35
Add a compatible string for the uart binding of NXP S32G2 platforms. Here
we use "s32v234-linflexuart" as fallback since the current linflexuart
driver can still work on S32G2.
Signed-off-by: Chester Lin <redacted>
---
Changes in v2:
- Remove redundant minItems/maxItems from compatible properties.
- Remove the redundant example.
- Rename the vendor string to "nxp," for s32g2.
.../devicetree/bindings/serial/fsl,s32-linflexuart.yaml | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
From: Chester Lin <hidden> Date: 2021-09-08 06:46:46
Add an initial dtsi file for generic SoC features of NXP S32G2.
Signed-off-by: Chester Lin <redacted>
---
Changes in v2:
- Add a SoC description.
- Add an interrupt-affinity to the pmu node.
- Move the psci node into the "/firmware" node.
- Remove the redundant properties and white lines.
- Remove the wrong interrupt specifier from the gic node.
- Specify the range and cell-size of /soc [0 - 4 GiB].
- Correct the reserved size of GICR to 512KiB [0x80000].
arch/arm64/boot/dts/freescale/s32g2.dtsi | 99 ++++++++++++++++++++++++
1 file changed, 99 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/s32g2.dtsi
From: Chester Lin <hidden> Date: 2021-09-08 06:46:56
Add serial/uart support for NXP S32G2 based on the information provided by
NXP's CodeAurora BSP.
Signed-off-by: Larisa Grigore <redacted>
Signed-off-by: Chester Lin <redacted>
---
Changes in v2:
- Add new Signed-off-by.
- Fix the copyright string.
- Remove aliases.
- Revise reg properties based on new cell size.
arch/arm64/boot/dts/freescale/s32g2.dtsi | 25 ++++++++++++++++++++++++
1 file changed, 25 insertions(+)
@@ -0,0 +1,26 @@+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT+/*+*Copyright(c)2021SUSELLC+*/++/dts-v1/;++#include"s32g2.dtsi"++/{+model="NXP S32G2 Evaluation Board (S32G-VNP-EVB)";+compatible="nxp,s32g274a-evb","nxp,s32g2";++aliases{+serial0=&uart0;+};++chosen{+stdout-path="serial0:115200n8";+};+};++/* UART (J58) to Micro USB port */+&uart0{+status="okay";+};
@@ -0,0 +1,32 @@+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT+/*+*Copyright(c)2021SUSELLC+*/++/dts-v1/;++#include"s32g2.dtsi"++/{+model="NXP S32G2 Reference Design Board 2 (S32G-VNP-RDB2)";+compatible="nxp,s32g274a-rdb2","nxp,s32g2";++aliases{+serial0=&uart0;+serial1=&uart1;+};++chosen{+stdout-path="serial0:115200n8";+};+};++/* UART (J2) to Micro USB port */+&uart0{+status="okay";+};++/* UART (J1) to Micro USB port */+&uart1{+status="okay";+};
--
2.30.0
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From: Chester Lin <hidden> Date: 2021-09-08 06:47:18
Add a new entry for the maintenance of NXP S32G DT files.
Signed-off-by: Chester Lin <redacted>
---
Changes in v2:
- Add information of reviewers.
MAINTAINERS | 9 +++++++++
1 file changed, 9 insertions(+)
From: Rob Herring <robh@kernel.org> Date: 2021-09-20 22:34:10
On Wed, 08 Sep 2021 14:45:22 +0800, Chester Lin wrote:
Convert the FSL LINFlexD UART binding to json-schema.
Signed-off-by: Chester Lin <redacted>
Reviewed-by: Andreas Färber <afaerber@suse.de>
---
Changes in v2:
- Drop the specific description "S32V234 SoC".
- Fill my name in the maintainer field. I tried to contact the authors
of fsl,s32-linflexuart.txt but got no response.
.../bindings/serial/fsl,s32-linflexuart.txt | 22 ---------
.../bindings/serial/fsl,s32-linflexuart.yaml | 46 +++++++++++++++++++
2 files changed, 46 insertions(+), 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt
create mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml
From: Rob Herring <robh@kernel.org> Date: 2021-09-20 22:34:42
On Wed, 08 Sep 2021 14:45:23 +0800, Chester Lin wrote:
Add a compatible string for the uart binding of NXP S32G2 platforms. Here
we use "s32v234-linflexuart" as fallback since the current linflexuart
driver can still work on S32G2.
Signed-off-by: Chester Lin <redacted>
---
Changes in v2:
- Remove redundant minItems/maxItems from compatible properties.
- Remove the redundant example.
- Rename the vendor string to "nxp," for s32g2.
.../devicetree/bindings/serial/fsl,s32-linflexuart.yaml | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
On Wed, Sep 08, 2021 at 02:45:20PM +0800, Chester Lin wrote:
Hello,
Here I'd like to propose a patchset, which is initial upstream support for NXP
S32G2. S32G is a processor family developed by NXP for automotive solutions,
such as vehicle networking and automotive high-performance processing. This
series focuses on S32G2, which is the latest generation we can find at the
moment. As the first round to support S32G2, this patchset only enables basic
components and interfaces the SoC must have while kernel booting, which aims
to have minimum hardware enablement for these two boards, S32G-VNP-EVB and
S32G-VNP-RDB2. The concepts of how these boards work are originated from the
downstream kernel tree[1] developed by NXP, which provides lots of details
about the SoC S32G274A and its integrated boards. This series has been
verified with downstream ATF[2] & U-Boot[3] based on the ATF boot flow.
Thanks,
Chester
[1] https://source.codeaurora.org/external/autobsps32/linux/
[2] https://source.codeaurora.org/external/autobsps32/arm-trusted-firmware/
[3] https://source.codeaurora.org/external/autobsps32/u-boot/
Changes in v2:
- dt-bindings:
- Rename the compatible vendor string to "nxp," for s32g2.
- Drop the specific description "S32V234 SoC".
- Fill my name in the maintainer field. I tried to contact the authors
of fsl,s32-linflexuart.txt but got no response.
- Remove redundant minItems/maxItems from compatible properties.
- Remove the redundant example from fsl,s32-linflexuart.yaml.
- dtsi/dts:
- Add a SoC description in s32g2.dtsi.
- Add an interrupt-affinity to the pmu node.
- Move the psci node into the "/firmware" node.
- Remove the redundant properties and white lines in DT.
- Remove the wrong interrupt specifier from the gic node.
- Specify the range and cell-size of /soc [0 - 4 GiB].
- Correct the reserved size of GICR to 512Kbytes [0x80000].
- Add new Signed-off-by to the DT uart patch.
- Fix copyright strings.
- Revise reg properties based on new cell-size.
- Move the serial/uart aliases from the SoC .dtsi to board .dts files.
- Correct the model string of RDB2.
- Add comments for the uart markings on PCB.
- Adjust RAM size comments of memory nodes.
- Convert reg addresses of memory nodes into hex format.
- MAINTAINERS
- Add information of reviewers.
Chester Lin (8):
dt-bindings: arm: fsl: add NXP S32G2 boards
dt-bindings: serial: fsl-linflexuart: convert to json-schema format
dt-bindings: serial: fsl-linflexuart: add compatible for S32G2
arm64: dts: add NXP S32G2 support
arm64: dts: s32g2: add serial/uart support
arm64: dts: s32g2: add VNP-EVB and VNP-RDB2 support
arm64: dts: s32g2: add memory nodes for evb and rdb2
MAINTAINERS: add an entry for NXP S32G boards