[PATCH] arm64: dts: imx8qm: add smmu node

Subsystems: arm/freescale imx / mxc / layerscape arm architecture, the rest

STALE1832d

3 messages, 3 authors, 2021-08-09 · open the first message on its own page

[PATCH] arm64: dts: imx8qm: add smmu node

From: Peng Fan (OSS) <hidden>
Date: 2021-08-07 10:10:54 

From: Peng Fan <peng.fan@nxp.com>

i.MX8QM has an iommu unit: SMMU-V2(mmu-500), add it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qm.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index aebbe2b84aa1..b8ffd5be6a3e 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -165,6 +165,22 @@ iomuxc: pinctrl {
 
 	};
 
+	smmu: iommu@51400000 {
+		compatible = "arm,mmu-500";
+		reg = <0 0x51400000 0 0x40000>;
+		#iommu-cells = <2>;
+		#global-interrupts = <1>;
+		interrupts = <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>;
+	};
+
 	/* sorted in register address */
 	#include "imx8-ss-img.dtsi"
 	#include "imx8-ss-dma.dtsi"
-- 
2.30.0


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Re: [PATCH] arm64: dts: imx8qm: add smmu node

From: Shawn Guo <shawnguo@kernel.org>
Date: 2021-08-09 08:16:38 

On Sat, Aug 07, 2021 at 06:45:17PM +0800, Peng Fan (OSS) wrote:
quoted hunk
From: Peng Fan <peng.fan@nxp.com>

i.MX8QM has an iommu unit: SMMU-V2(mmu-500), add it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qm.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index aebbe2b84aa1..b8ffd5be6a3e 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -165,6 +165,22 @@ iomuxc: pinctrl {
 
 	};
 
+	smmu: iommu@51400000 {
+		compatible = "arm,mmu-500";
+		reg = <0 0x51400000 0 0x40000>;
+		#iommu-cells = <2>;
+		#global-interrupts = <1>;
+		interrupts = <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>;
Use macro to make it more readable.

Shawn

+	};
+
 	/* sorted in register address */
 	#include "imx8-ss-img.dtsi"
 	#include "imx8-ss-dma.dtsi"
-- 
2.30.0
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Re: [PATCH] arm64: dts: imx8qm: add smmu node

From: Robin Murphy <robin.murphy@arm.com>
Date: 2021-08-09 11:44:44 

On 2021-08-07 11:45, Peng Fan (OSS) wrote:
From: Peng Fan <peng.fan@nxp.com>

i.MX8QM has an iommu unit: SMMU-V2(mmu-500), add it.
Given CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT, you may want to add 
this in a disabled state until you've filled in all the "iommus" 
properties for the client devices. Otherwise, be prepared to hear from 
people reporting issues bisected to this patch ;)

Robin.
quoted hunk
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
  arch/arm64/boot/dts/freescale/imx8qm.dtsi | 16 ++++++++++++++++
  1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index aebbe2b84aa1..b8ffd5be6a3e 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -165,6 +165,22 @@ iomuxc: pinctrl {
  
  	};
  
+	smmu: iommu@51400000 {
+		compatible = "arm,mmu-500";
+		reg = <0 0x51400000 0 0x40000>;
+		#iommu-cells = <2>;
+		#global-interrupts = <1>;
+		interrupts = <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+			     <0 32 4>;
+	};
+
  	/* sorted in register address */
  	#include "imx8-ss-img.dtsi"
  	#include "imx8-ss-dma.dtsi"
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